Patents Examined by Kevin Pyu
  • Patent number: 6316760
    Abstract: The solid-state imaging apparatus of this invention includes a voltage generation circuit including a transistor having a same device structure as the reset transistor and fabricated on a same substrate as the reset transistor, a gate of the transistor constituting the voltage generation circuit being commonly connected with a gate of the reset transistor, the voltage generation circuit generating the discharge potential to be applied to the reset transistor, wherein the voltage generation circuit includes a holding circuit for holding a potential at a source of the transistor constituting the voltage generation circuit in a level higher than a channel potential below the gate of the transistor constituting the voltage generation circuit.
    Type: Grant
    Filed: July 16, 1999
    Date of Patent: November 13, 2001
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Eiji Koyama