Patents Examined by Khanh Dvong
  • Patent number: 6713817
    Abstract: A semiconductor integrated circuit system includes first and second semiconductor devices formed on a substrate and required to have properties the same as each other in operation. The first and second semiconductor devices respectively includes first and second channel regions arranged in a surface of the substrate, and first and second gate electrodes disposed on the first and second channel regions via gate insulating films. A relaxing structure is arranged to reduce fluctuations in the properties of the first and second semiconductor devices, the fluctuations being caused by the electrical effects of plasma when a plasma process is performed. The relaxing structure includes first and second short-circuiting elements respectively connected to the first and second wiring layers and equivalent to each other. The first and second short-circuiting elements are configured to short-circuit the first and second gate electrodes with the first and second channel regions, respectively.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: March 30, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobutaka Kitagawa, Ken Tanabe
  • Patent number: 5998291
    Abstract: Method of fabricating high density multilayer interconnect structures or flexible HDMI decals. The methods secure a top surface of an HDMI decal fabricated on a rigid substrate to a protective film layer which is in turn adhesively secured to a flat carrier. This structure is then demounted or delaminated from the rigid substrate. The bottom of the HDMI decal, with the protective film layer and flat carrier attached thereto, is secured to a mounting substrate using a relatively thick adhesive layer. After the HDMI decal is adhesively secured to the mounting substrate, the carrier and protective film layer are removed. The top surface of the HDMI decal thus remains flat after it is secured to the mounting substrate, and therefore connection of integrated circuit chips to contact pads on the top surface of the decal is ensured because this surface is flat. The carrier and protective film layer also protects the top surface of the decal while it is secured to the mounting substrate.
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: December 7, 1999
    Assignee: Raytheon Company
    Inventors: Gabriel G. Bakhit, George Averkiou
  • Patent number: 5989963
    Abstract: A method of manufacturing a semiconductor device with a steep retrograde profile. The threshold voltage adjust dopant layer and the punchthrough prevent dopant layer are formed in the substrate. All surface capping layers are removed from the active device regions and, the semiconductor device is placed in a chamber and a high vacuum is established after which an inert atmosphere is introduced into the chamber. The anneal to repair the damage to the lattice and to activate the dopant ions in the dopant layers is done in the inert atmosphere with the surface of the substrate maintained clean, that is, free from a capping oxide or other layer formed on the surface of the substrate.
    Type: Grant
    Filed: July 21, 1997
    Date of Patent: November 23, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Scott D. Luning, David C. Greenlaw, Jonathan Fewkes