Abstract: Reconfigurable distributed active transformers are provided. The exemplary embodiments provided allow changing of the effective number and configuration of the primary and secondary windings, where the distributed active transformer structures can be reconfigured dynamically to control the output power levels, allow operation at multiple frequency bands, maintain a high performance across multiple channels, and sustain desired characteristics across process, temperature and other environmental variations. Integration of the distributed active transformer power amplifiers and a low noise amplifier on a semiconductor substrate can also be provided.

Abstract: There is provided a digital switching amplifier capable of enhancing an S/N ratio at the time of a small signal output and reducing current consumption and electromagnetic interference (EMI).

Abstract: A differential amplifier formed on a silicon-on-insulator substrate, including means to prevent the bodies of its differential input transistors from charging to unwanted potentials in the standby state. In one aspect of the invention, the means takes the form of switching transistors inserted between the differential input transistors and their loads. In another aspect of the invention, the means takes the form of switching transistors inserted between the sources and bodies of the differential input transistors. In another aspect of the invention the means is a regulator section that holds the bodies of the differential input transistors at an appropriate potential level.

Abstract: In a signal determining apparatus including an amplifier circuit adapted to receive and amplify an input signal to generate an output voltage, and a comparator adapted to compare the output voltage of the amplifier circuit with a reference voltage to generate an output signal, the amplifier circuit has variable response speed characteristics so that a response speed of the amplifier circuit is controlled during its amplifying operation.

Abstract: A power amplifying apparatus has: a signal converting section (20) which converts an input signal of an orthogonal coordinate system to an amplitude signal and phase signal of a polar coordinate system, which then converts the phase signal to an orthogonal-coordinate phase signal of the orthogonal coordinate system, and which outputs the amplitude signal and the orthogonal-coordinate phase signal; a modulating section (30) which performs orthogonal modulation on the orthogonal-coordinate phase signal, and which outputs the modulated signal to a nonlinear power amplifier (2); and a correcting section (40) which outputs a gain control signal for the nonlinear power amplifier (2). The correcting section (40) has a correction LUT which is produced on the basis of an output signal of the nonlinear power amplifier (2) and the input signal of the orthogonal coordinate system, and outputs the gain control signal with reference to the correction LUT on the basis of the amplitude signal.

Abstract: A system and method is provided for detecting an over-current condition in a power field-effect transistor (FET). In one embodiment, an over-current detection circuit for detecting an over-current condition in a power FET comprises a current generator circuit operative to generate a reference current and a plurality of matched FETs operative to receive the reference current and provide a reference voltage, the matched FETs being matched to each other and to the power FET. The over-current detection circuit also comprises a comparator operative to measure a drain-to-source voltage of the power FET and to provide an output that indicates that the drain-to-source voltage of the power FET has exceeded the reference voltage.

Abstract: A PWM circuit converts output data of a calculator to a pulse width modulation signal, and outputs it to a load (speaker) through a buffer amplifier and a low-pass filter. A digital low-pass filter has the same filter characteristic as a low-pass filter. An error calculator calculates the error ?(z) between the input data and the output of the filter, and outputs it to the calculator. The output of the filter becomes a digital signal having substantially the same digitalized waveform as an analog signal applied to the load, and also no distortion contains in the digital signal. Accordingly, the output data ?(z) of the error calculator becomes data corresponding to the distortion of the output signal. In the calculator, the data ?(z) is subtracted from the input data, and the subtraction result is applied to the PWM circuit to reduce the distortion.

Abstract: The input stage of an operational amplifier includes at least four signal-receiving stages adapted to receive four primary input signals. If the voltage level associated with any of the input signal changes, at least one transistor in each of the at least four signal-receiving stages conducts more current and at least one transistor in each of these stages conducts less current. The four signal-receiving stages collectively generate at least four intermediate signals that are delivered to the output stage of the differential amplifier, which in response, generates a pair of differential output signals. Two of the input signals are derived from the pair of differential output signals and are fed back to control the amplifier.

Abstract: Pre-distortion compensation circuits (11, 12) are disposed at stages previous to carrier amplifier 13 and peak amplifier 14, respectively. Pre-distortion compensation circuit (11) has such characteristics that compensate carrier amplifier (13) for a distortion characteristically produced on the operation thereof, particularly, an amplitude-phase (AM-PM) distortion, while pre-distortion compensation circuit (12) has such characteristics that compensate peak amplifier (14) for a distortion characteristically produced on the operation thereof, particularly, an AM-PM distortion. Thus, the Doherty amplifier is also compensated for its own AM-PM distortion characteristic to accomplish a low distortion characteristic and implement an ideal power combining operation thereof.

Abstract: A power amplifier apparatus includes a dither superimposing unit superimposing DC dither on a digital signal; a switching signal generating unit converting the digital signal on which the DC dither is superimposed by the dither superimposing unit to a pair of drive pulses on high and low sides having opposite levels; and a cancel signal generating unit generating a cancel signal to cancel a DC component caused by the DC dither by changing a ratio of pulse widths of the drive pulses on the high and low sides generated by the switching signal generating unit.

Abstract: An amplifier circuit includes first, second, third and fourth transconductance amplifiers that each have an input, an output and a transconductance gain. The outputs of the first, second and third amplifiers communicate with the inputs of the second, third and fourth amplifiers, respectively. A first resistance has ends that communicate with the input and the output of the second amplifier, respectively. A second resistance has ends that communicate with the input and the output of the fourth amplifier, respectively. Fifth, sixth, seventh and eighth amplifiers each have an input, an output and a gain. The outputs of the fifth, sixth and seventh amplifiers communicate with the inputs of the sixth, seventh and eighth amplifiers, respectively. A third resistance has one end that communicates with the input of the first amplifier and an opposite end that communicates with the output of the eighth amplifier.

Abstract: An apparatus and a method for controlling a bias adaptation bias of a high power amplifier. In the high power amplifier, a coupling operation is performed with respect to an input signal with a predetermined voltage, an amount of attenuation used for attenuating a voltage of the coupled input signal is adjusted corresponding to the voltage of the input signal, a bias adaptation bias is created correspondingly to a voltage obtained by attenuating the voltage of the input signal by the amount of the attenuation, and the coupled input signal is amplified corresponding to the bias adaptation bias, thereby performing a signal amplifying operation for maintaining linearity of an input signal, regardless of an average input voltage intensity of the input signal.

Abstract: An apparatus and method for transmitting signal, the apparatus comprising a front end telecommunications module including a power amplifier, a matching circuit coupled to the power amplifier, and a filter coupled to the matching circuit, such that a signal received by the power amplifier is transmitted to the filter through the matching circuit. The telecommunications module provides quad-band capability in a compact design.

Abstract: Disclosed is a distortion compensating and power amplifying apparatus including: a transistor to power amplifies an input signal; a branch circuit to branch the input signal into two signals; distortion compensation means for generating a second harmonic of a fundamental wave for one of branched signals and adding the generated second harmonic to the other branch signal from said branch circuit for input to an input terminal of said transistor; and a termination circuit connected to an output terminal of said transistor and grounding the second harmonic.

Abstract: A radio frequency (RF) generator includes a first half bridge including first and second power transistors; a second half bridge including first and second power transistors; an output node coupling the first and second half bridges and RF signals to a load; positive and negative rails coupled to an AC power source via a rectifier; a first blocking capacitor provided between the positive rail and the load; a second blocking capacitor provided between the negative rail and the load; and a voltage regulator configured to output a given voltage to the first and second bridges, wherein the first and second blocking capacitors are configured to isolate the load from the AC power source.

Abstract: An amplifier is provided. The amplifier comprises an H-bridge with two halves. A capacitor and two inductors are coupled to the H-bridge. Each inductor, a half of the H-bridge, and the capacitor are configured as a boost converter.

Abstract: A feedback resistor of a feedback circuit included in a photo-receiving amplifier element is formed on an island region in which an electric potential is in a floating state. The island region is electrically isolated from an island region on which an element other than the feedback resistor is formed. This enables the response speed of the photo-receiving amplifier element to be increased without changing the process of the circuit or varying a resistance value of the feedback resistor in a first-stage amplifier unit.

Abstract: A delay mismatched feed forward power amplifier is disclosed. Loop 1 includes a main amplifier and is used to derive a carrier cancelled sample of the main amplifier output. Loop 2 includes an error amplifier used to amplify the carrier cancelled signal derived from Loop 1 operation in order to cancel distortion products generated due to the nonlinear nature of the main amplifier. Loop 2 also utilizes a very short Loop 2 delay line. A significant efficiency gain is provided due to reduced output power losses associated with the Loop 2 delay line. Lower output losses also results in lower distortion levels produced by the main amplifier. This, in turn, reduces the size and performance requirements placed on the error amplifier. A smaller and more efficient error amplifier is employed resulting in further amplifier system efficiency improvement. The delay mismatch is compensated by a third control loop, a special adaptive control algorithm or a combination thereof.

Abstract: An automatic level control circuit comprises a level detection circuit which detects attack detection to sense a detection level greater than a predetermined level and recovery detection to sense a detection level smaller than the predetermined level, and a gain control circuit which outputs a gain adjustment control signal to regulate a gain of an variable gain amplifier such that an output signal from the variable gain amplifier is set to a predetermined signal level. The gain control circuit generates multiple candidate signals to change the gain at different response speeds, and selectively outputs, as a gain adjustment control signal, one of the candidate signals capable of providing the smallest value as the gain. Therefore, even when the gain is rapidly reduced by the attack action against a short-duration large signal, the gain can be returned to its original state at an appropriate speed.

Abstract: An amplification system capable of reducing DC offset in a baseband signal, which has first and second differential output terminals, first and second low pass filters, and first and second amplifiers. The first low pass filter filters a first input signal to thus generate a first filtered signal. The first amplifier amplifies the first input signal and the first filtered signal to thus generate a first amplified signal. The second low pass filter filters a second input signal to thus generate a second filtered signal. The second amplifier amplifies the second input signal and the second filtered signal to thus generate a second amplified signal. The system couples the first and second amplified signals at the first and the second differential output terminals to thus reduce the DC offset of a differential voltage signal output by the first and second differential output terminals.