Abstract: Disclosed herein is a semiconductor integrated circuit device including a standard cell with a fin extending in a first direction. The fin and a gate line extending in a second direction perpendicular to the first direction and provided on the fin constitute an active transistor. The fin and a dummy gate line provided in parallel with the gate line constitute a dummy transistor. The active transistor shares a node as its source or drain with the dummy transistor.
Abstract: A method for manufacturing a solid-state image pickup device that includes a substrate including a photoelectric conversion unit and a waveguide arranged on the substrate, the waveguide corresponding to the photoelectric conversion unit and including a core and a cladding, includes a first step and a second step, in which in the first step and the second step, a member to be formed into the core is formed in an opening in the cladding by high-density plasma-enhanced chemical vapor deposition, and in which after the first step, in the second step, the member to be formed into the core is formed by the high-density plasma-enhanced chemical vapor deposition under conditions in which the ratio of a radio-frequency power on the back face side of the substrate to a radio-frequency power on the front face side of the substrate is higher than that in the first step.
Type:
Grant
Filed:
February 2, 2012
Date of Patent:
December 29, 2015
Assignee:
CANON KABUSHIKI KAISHA
Inventors:
Tadashi Sawayama, Hiroshi Ikakura, Takaharu Kondo, Toru Eto
Abstract: A fully differential class D amplifier is provided. The class D amplifier includes an active amplifier in the feedback path of the modulator. In one embodiment, the class D amplifier includes a fully differential amplifier as an input buffer, in which a supply-independent reference voltage is used as the common mode voltage of the output of the fully differential amplifier. In one embodiment, the class D amplifier includes a pulse width modulation circuit that includes rail-to-rail comparators.
Type:
Grant
Filed:
July 28, 2006
Date of Patent:
December 9, 2008
Assignee:
National Semiconductor Corporation
Inventors:
Sumant Bapat, Ansuya Bhatt, Christopher B. Heithoff, Raminder Jit Singh
Abstract: A method of manufacturing a microlens array substrate is provided comprising the steps of: closely providing a substrate precursor (30) between a first master mold (10) having a plurality of curved surfaces (12) and a second master mold (20) having a plurality of projections (22) to form a substrate (32) having a plurality of lenses (34) formed by the curved surfaces (12) and recesses (36) formed by the projections (22); removing the first and second master molds (10, 20) from the substrate (32); and filling the recesses (36) with a shading material (42) after the second master mold (20) is removed.