Abstract: A signal detection circuit receives a data stream containing a signal to be detected and detects the contained to-be-detected signal. The signal detection circuit includes a memory circuit prestoring data for detecting the to-be-detected signal, a first data feeder for feeding data to the memory circuit per given time slot as an upper address, and a second data feeder for feeding data to the memory circuit as a lower address using data outputted from the memory circuit. The memory circuit outputs data stored in a storage area defined by the upper address and the lower address fed from the first and second data feeders, respectively. By arranging the memory circuit to output a given value as the foregoing output data when the to-be-detected signal is detected, detection of the to-be-detected signal is achieved.

Abstract: A virtual device driver registry for use in connection with a computer system for providing virtual device driver call information to a program operating in said computer system in response to a call information request. The virtual device driver registry maintains a registration database including a plurality of entries, each entry including a virtual device driver identifier and virtual device driver call information. The registry establishes the entries in the registration database in response to receipt of virtual device driver registration requests from the virtual device drivers as they are initialized. The registry responds to call information requests from the programs to provide call information for the registered virtual device drivers.

Abstract: A method and apparatus for bandwidth balancing of data transfer operations between a computer and a storage subsystem are disclosed. The storage subsystem contains a number of storage devices such as magnetic disk drives. Data to be stored is supplied by the computer to the storage subsystem in the form of a transfer unit through a communication channel. The storage subsystem divides the transfer unit into a number of stripes of a pre-determined size. Each stripe is allocated to a separate disk drive whose disk surfaces are formatted into a number of track bands. Each track band is composed of several contiguous tracks associated with the same data transfer rate. Each stripe is then stored on its disk drive within a selected track band. Both data storage and retrieval from each disk drive occur at the data transfer rate associated with the accessed track band.

Abstract: A method for adaptive routing of messages in a computer network. The method provides adaptive source routing by generating at a source node a routing message describing a plurality of allowable paths via which data message can reach a desired destination. The data message and the routing message are sent by the source to a first switch, and the routing message is evaluated by control logic to determine if an available, allowable path exists. If so, the data message and routing message are sent via that path to the destination.

Abstract: In an image input/output control apparatus having three lines of n-bit bidirectional data buses provided on an external apparatus connection side of the apparatus and four lines of n-bit bidirectional data buses provided on an image memory side of the apparatus, there are provided a first inner register for setting the data transfer direction of each of the bidirectional data buses and a second inner register for setting an image valid area, whereby the data transfer direction of each of the bidirectional data buses is determined by a set point of the first inner register and the image valid area is determined by a set point of the second inner register.

Abstract: A protected mode operating system utilizes a protected mode hard disk driver which bypasses an existing real mode hard disk driver on computer systems in which the real mode hard disk driver performs geometry translation of hard disk addresses. The protected mode hard disk driver determines a geometry translation based on geometry data retrieved from the computer systems' hard disk, then verifies whether the geometry translation is utilized by the existing real mode hard disk driver by trapping accesses to hard disk input/output ports, and issuing read requests to the existing real mode hard disk driver at plural hard disk addresses.

Abstract: A communication system is provided for transferring broadband multimedia data through a network. The system includes network terminals, a transmission backbone, and a call set-up server. The call set-up server controls call handling and connection handling or channel allocation. Channel allocation is handled separately from call control, enabling upgrading of connection handling hardware and software without affecting the rest of the system.

Abstract: A digital signal processor performs a predetermined operation on a digital signal based on data, such as coefficient parameters and programs, and outputs the processed digital signal to an external reproducing device. The digital signal is processed during a signal processing period and data is transferred and rewritten during an information transfer period. The digital signal processor generates a reference processing cycle having a period longer than the signal processing period and the information transfer period combined. The length of the signal processing period and the information transfer period are adjusted within the reference process cycle, and the signal processing and data transfer are performed in a time sharing manner via a common internal bus. When data is changed, the digital signal is outputted without being processed to an external reproducing device to maintain the continuity of the signal output.

Abstract: An ATM communication system for statistical multiplexing of message cells has a plurality of upstream interfaces, at least one multistage funnel of switching elements connected thereto, and at least one downstream interface. Each of the switching elements comprises a plurality of inputs and at least one output to which a logical queue is associated. The logical queue of each of the switching elements is common for different traffic classes. For the filling of the logical queues to each of the traffic classes, a predetermined threshold is defined. In case of exceeding the threshold for the respective traffic class by receiving a message cell for this traffic class, a back pressure signal is transmitted only to the switching element or upstream interface, respectively, just transmitting this message cell. The transmission of message cells is stopped by this switching element or upstream interface, respectively, for a predetermined period of time periodically until a resetting of the back pressure signal.

Abstract: Upon receiving a data transfer command for a first disk drive supplied from a first host apparatus, a disk controller activates the seek operation of the first disk drive. In this state, when a second host apparatus supplies a data transfer command for a second disk drive, the disk controller 22 receives the command and activates the seek operation for the second disk drive. The disk controller 22 first executes data transfer between one of the first and second disk drives in a multi-seek operation state, which has completed the seek operation first, and the host apparatus.

Abstract: A computing system with a SCSI controller includes SCSI transmission mode selection apparatus and method to switch the transmission line drivers between transmitting in SCSI 1, SCSI 2 or another mode. The controller selects a maximum data transmission rate compatible with each peripheral device connected to the controller. A user-defined option code is decoded by the controller to provide the user with control over transmission mode options for the drivers in the controller. Based on the data transmission rate and the selected option, the controller selects the SCSI transmission mode to use for each driver type, acknowledge line or data lines.

Abstract: In a distributed information processing system which is capable of transmitting a character string as information with first and second character string storing means which are based on character coding schemes and connected to each other over telecommunication line, there is provided a code conversion means for converting a character string outputted from said first character string storing means into a character code based on the character coding scheme in said second character string storing means, so that the external character can be uniformly dealt with between platforms connected through a network.

Abstract: A novel electronic information transport component can be incorporated in a wide range of electronic information products, for example magazine collections, to automate the mass distribution of updates, such as current issues, from a remote server to a wide user base having a diversity of computer stations. Advantages of economy, immediacy and ease of use are provided. Extensions of the invention permit automated electronic catalog shopping with order placement and, optionally, order confirmation. A server-based update distribution service is also provided.

Abstract: A personal computer is used to assist in the selection of television programs to be recorded at future times and to control a video tape recorder to implement the selected recordings. An application program allows the computer to receive data representing a schedule of future programs. The operator can perform data base operations on the data to obtain listings of programs of particular interest. A program to be recorded is selected by moving a cursor into position with the display of the program listing on the computer. An output device generates infrared signals to control the video tape recorder and a cable box to tune and record a selected program.

Abstract: An intelligent disk drive having error detection and correction capability employs an embedded error correction controller with a pipelined architecture for performing error correction under program control. The pipelined architecture provides parallel operand fetching and instruction execution for high speed operations during error correction.

Abstract: A device independent modem interface employs a call control and data transfer application programming interface for application programs to access a modem in a device independent fashion. A universal modem driver reads device specific information from a registry to issue specific control commands to a modem. The universal modem driver separates command mode and data mode of the modem transparently to the application. The modem interface also includes support for detecting a modem and for loading device specific information into the registry based on the modem identification.

Abstract: A television cable system includes a headend and a decoder coupled by an in-band communication link and an out of band communication link. The headend controller includes conventional transmission systems for providing a plurality of program channels to the decoder via the in-band communication link. In addition, the headend system includes a plurality of controller inputs which provide data to a download executive circuit which in turn organizes data and transfer it to a transmitter coupled to the out of band data link. Within the decoder, a pair of processors are operative via a communication link therebetween. One processor is of predefine capability and is used to operate a user keyboard as well as conventional tuning and signal processing and descrambling systems to provide television display. The remaining processor includes a memory manager coupled to an out of band transmission receiver which receives downloaded interpretive execution data.

Abstract: A networking system is disclosed that has an improved address resolution protocol. The network system, which includes a table or cache, has a plurality of nodes, each node having a unique address. The protocol establishes in the table an address mapping for each of the nodes in the network system being used. The protocol generates a target address for an addressing request. When an address mapping needs to be reresolved/refreshed, the protocol then sends the request to the node associated with the address currently in the table. The protocol allows for a certain amount of time for the node to accept the request and then updates the address mapping table based upon a reply received within that limited time. If the node fails to reply within a given time, the protocol then broadcasts the request throughout the networking system until a response is received. Once a response is received, the system then updates the table of address mapping.

Abstract: A handheld computer which contains an LCD display having a digitizing surface to allow pen input. Internal storage takes several forms, such as a large flash ROM area, battery-backed up RAM and an optional hard disk drive. Several alternative communication paths are available, such as the previously mentioned modem, a parallel printer port, a conventional serial port, a cradle assembly connected to the host computer, and various wireless short distance techniques such as radio frequency or infrared transmission. The computer can readily communicate with other sources, particularly to a host desktop computer, to allow automated synchronization of information between the host and the handheld system. Preferably the remote synchronization is performed at several user selectable levels. When the handheld computer is in a cradle and actively connected to the host computer, automatic capture of updated data in the host computer is performed.

Abstract: A parallel processing control apparatus comprises processing blocks each providing an equal function and incorporating pipeline operation units; a status register for storing statuses of the processing blocks; an instruction feeder for simultaneously allocating instructions to the processing blocks; a flagging unit for setting a flag for a corresponding one of the processing blocks to indicate that at least one instruction fed to another of the processing blocks and positioned, on a sequential model, behind an instruction being processed in the flagged processing block has been processed or passed through a specific stage; a flag holder for holding the flag; and a write controller for selecting a processing block whose status is to be written in the status register.