Abstract: A system for interfacing a host computer to a Controller Area Network (CAN) bus. The system comprises a memory, an embedded processor and interface logic. The memory stores program code. The embedded processor couples to the memory and executes the program code. The interface logic interfaces the embedded processor with an interconnecting bus, e.g., the Real-Time System Integration (RTSI) bus. In response to execution of the program code, the embedded processor is operable to perform a CAN event in response to the interface logic receiving a RTSI trigger signal on a selected line of the RTSI bus. A peripheral device also coupled to the host computer assert the trigger signal in response to the peripheral device receiving and/or transmitting data. Furthermore, the interface logic is configured to assert a RTSI trigger signal on a selected line of said RTSI bus in response to the embedded processor performing a CAN event. CAN events include transmission/reception of a CAN frame.
Type:
Grant
Filed:
August 2, 2000
Date of Patent:
January 18, 2005
Assignee:
National Instruments Corporation
Inventors:
Zaki Chasmawala, William R. Pitts, Rodney W. Cummings, James W. Edwards