Abstract: Disclosed herein are thin film transistors (TFTs) and techniques for fabricating TFTs. A major plane of the gate electrode of the TFT may be vertically oriented with respect to a horizontal layer of polysilicon in which the TFT resides. An interface between the gate electrode and gate dielectric may be vertically oriented with respect to a horizontal layer of polysilicon in which the TFT resides. The TFT may have a channel width that is defined by a thickness of the horizontal layer of polysilicon. The TFT may be formed by etching a hole in a layer of polysilicon. Then, a gate electrode and gate dielectric may be formed in the hole by depositing layers of dielectric and conductor material on the sidewall. The body may be formed in the horizontal layer of polysilicon outside the hole.

Abstract: A method for producing a p-type ZnO based compound semiconductor layer is provided. The method comprises the steps of (a) preparing an n-type single crystal ZnO based compound semiconductor structure containing a Group 11 element which is Cu and/or Ag and at least one Group 13 element selected from the group consisting of B, Ga, Al, and In, and (b) annealing the n-type single crystal ZnO based compound semiconductor structure to form the p-type ZnO based compound semiconductor layer co-doped with the Group 11 element and the Group 13 element.