Abstract: A semiconductor device includes a first semiconductor chip having a plurality of pads, a second semiconductor chip having a plurality of pads, the second semiconductor chip being fixed over a main surface of the first semiconductor chip, an insulating layer formed between the first semiconductor chip and the second semiconductor chip a plurality of conductive posts formed over the main surface of the first semiconductor chip and a main surface of the second semiconductor chip, the plurality of conductive posts being electrically connected to the plurality of pads on the first semiconductor chip and the plurality of pads on the second semiconductor chip and a resin covering the main surfaces of the first and second semiconductor chips, the resin partially covering the plurality of conductive posts.

Abstract: A power semiconductor device (10) has an active region that includes a drift region (20). At least a portion of the drift region (20) is provided in a membrane (16) which has opposed top and bottom surfaces (15,17). In one embodiment, the top surface (15) of the membrane (16) has electrical terminals connected directly or indirectly thereto to allow a voltage to be applied laterally across the drift region (20). In another embodiment, at least one electrical terminal is connected directly or indirectly to the top surface (15) and at least one electrical terminal is connected directly or indirectly to the bottom surface (17) to allow a voltage to be applied vertically across the drift region (20). In each of these embodiments, the bottom surface (17) of the membrane (16) does not have a semiconductor substrate positioned adjacent thereto.

Abstract: The state of a surface of a substrate 11 or a GaN group compound semiconductor film 12 formed on the substrate 11 is modified with an anti-surfactant material and a GaN group compound semiconductor material is supplied by a vapor phase growth method to form dot structures made of the GaN group compound semiconductor on the surface of the semiconductor film 12, and the growth is continued until the dot structures join and the surface becomes flat. In this case, the dot structures join while forming a cavity 21 on an anti-surfactant region. A dislocation line 22 extending from the underlayer is blocked by the cavity 21, and therefore, the dislocation density of an epitaxial film surface can be reduced. As a result, the dislocation density of the GaN group compound semiconductor crystal can be reduced without using a masking material in the epitaxial growth, whereby a high quality epitaxial film can be obtained.

Abstract: A semiconductor layer has one end placed on top of a first conductive layer and in contact with the first conductive layer, and the other end placed on top of a second conductive layer and in contact with the second conductive layer. At the central portion, the semiconductor layer faces a gate electrode layer with a gate insulating layer interposed therebetween. The semiconductor layer is formed so that its width W1 is smaller than its height H1. As a result, a thin film transistor and manufacturing method thereof can be obtained in which contact between a source/drain region of the thin film transistor and an upper or lower conductive layer can be made stably.

Abstract: An apparatus and a method for providing a fully protective package for a flip chip with a protective shield plate and an underfill encapsulant material. The apparatus comprises a semiconductor chip electrically connected by flip chip attachment to a substrate. A shield plate is placed in contact with a back surface of the semiconductor chip. An underfill encapsulant is disposed between the semiconductor chip and the shield plate, and the substrate. A glob top encapsulant may be applied about the periphery of the upper surface of the shield plate that extends to the substrate for additional protection and/or adherence.

Abstract: The invention relates to a phase-change memory device. The device includes a double-wide trench into which a single film is deposited but two isolated lower electrodes are formed therefrom. Additionally a diode stack is formed that communicates to the lower electrode. Additionally, other isolated lower electrodes may be formed along a symmetry line that is orthogonal to the first two isolated lower electrodes. The present invention also relates to a method of making a phase-change memory device. The method includes forming two orthogonal and intersecting isolation structure s around a memory cell structure diode stack.

Abstract: The semiconductor elements for the small signal type circuits and the Au wire for connection are integrated as one package to produce the semiconductor devices 30A, 31A, 32, 33A, 34A and 38. In this way, the wire bonding of Au can be omitted, and the wire bonding of the small diameter Al wire and the large diameter Al wire is only required to complete the connection of the fine metal wire. These semiconductor devices have a plurality of circuit elements as one package, so that the mounting operation on the mounting board can be significantly reduced.

Abstract: A composite member containing a separation area inside. A mechanical strength of the separation area is non-uniform along a surface of the composite member or along a bonded face. A mechanical strength of a peripheral portion of the separation area is locally low.

Abstract: In a semiconductor device, an island penetrating hole, which is larger than a mounted chip, is formed on an island of a lead frame, and a heatsink is mounted on the island so as to cover the island penetrating hole. The chip is disposed on a surface of the heatsink in the island penetrating hole. The ground terminal of the chip and the island are wire-bonded to each other via GND wires. This arrangement makes it possible to reduce a heat resistance in a heat-releasing path, thereby improving a heat-releasing property. Further, the GND wires are shortened and a GND inductance is reduced. Consequently, it is possible to efficiently exert capability of the chip.