Patents Examined by L. Toplu
  • Patent number: 5557799
    Abstract: A personal computer when attempting to boot from a diskette (5) searches the boot record of the diskette for com. When found, com and the eight characters preceding com in the boot record are compared with the first two entries of the directory of the diskette. If no match is found, the personal computer responds on the basis of the diskette being a data diskette. Otherwise, the personal computer executes the boot record of the diskette. This minimizes error messages and operator involvement.
    Type: Grant
    Filed: November 7, 1990
    Date of Patent: September 17, 1996
    Assignee: International Business Machines
    Inventor: Glenn E. Welman
  • Patent number: 5496177
    Abstract: A method is provided for introducing to a user a new/enhanced function of a computer software application. After learning the basics of a computer software application, new/enhanced functions are presented to the user based upon completion of predetermined criteria. The predetermined criteria may comprise the passage of time or the completion of a specified number of uses of a certain function.
    Type: Grant
    Filed: March 15, 1994
    Date of Patent: March 5, 1996
    Assignee: International Business Machines Corporation
    Inventors: Sherry S. Collia, Greg P. Fitzpatrick, William R. Sterrett
  • Patent number: 5448731
    Abstract: A method and apparatus are disclosed for controlling the deferred execution of user requests in a data processing system. In the depicted embodiment of the present invention, each deferred user request includes a plurality of user defined attributes which may include a desired time of execution, a relative importance assigned, a ranking of the request security level and an indication of the organization level of the user for each deferred request. A deferred application request service is then established and utilized to evaluate the attributes associated with each deferred user request. The order of execution of each deferred request is then determined by the evaluation of each of these user specified attributes, in a specified order. A user specified precedence value for each attribute may be utilized in order to resolve conflicts in the order of execution between multiple deferred requests.
    Type: Grant
    Filed: November 20, 1990
    Date of Patent: September 5, 1995
    Assignee: International Business Machines Corporation
    Inventors: Diana S. Wang, Marvin L. Williams
  • Patent number: 5446897
    Abstract: A method and apparatus for automatically associating physical network addresses with logical identifiers in local area networks. The physical network address is transmitted to a central administrator of the local area network, where the association between such address and a logical identifier is made. In the case where a new device is being installed on the network, the logical identifier may be an arbitrary word, number, or combination thereof which is supplied by the operator at the central administrator. In the situation where a device is being replaced, the logical identifier is the same as the identifier of the replaced device, while the physical network address of the replacement device is substituted in the association for the address of the replaced device. A compilation of the associations is maintained at the central administrator, and the associations are transmitted back to the devices being installed or replaced, as well as other devices on the network.
    Type: Grant
    Filed: August 31, 1990
    Date of Patent: August 29, 1995
    Assignee: International Business Machines Corporation
    Inventors: Thomas B. Mathias, Richard J. Planutis, Judith A. Wierbowski
  • Patent number: 5432724
    Abstract: A data processing system for processing parallel first and second sequences of successive first and successive second data, respectively, includes a memory, having a memory input to receive the first and second data for storage; and an operating circuit coupled to a memory output of the memory to receive a predetermined number of selected ones of the stored first data or the predetermined number of selected ones of the stored second data supplied by the memory, and for operating thereon. The memory is operative to store the first and second data provided in parallel at the memory input as first and second fields of a single word, each word being retrievable upon a single access. The system includes a rearrangement circuit, connected between the memory output and the operating circuit for receiving particular words and for alternately and in parallel providing the predetermined number of successive first data and the predetermined number of successive second data to the operating circuit.
    Type: Grant
    Filed: December 2, 1993
    Date of Patent: July 11, 1995
    Assignee: U.S. Philips Corporation
    Inventor: Willem L. Repko
  • Patent number: 5289585
    Abstract: A microprocessor system has a bus system for coupling several processing units, each having an appertaining private cache memory and a common main memory. When an address operation of a transaction is executed, a transaction identification number is generated and transmitted on the system bus to all other subscribers together with the fed address of the initiating subscriber. In each subscriber, memory means are provided for storing the transmitted address and the co-delivered transaction identification number. Simultaneously with the assignment of the system bus for further transmissions, the address stored in the memory means are monitored in test means of the subscribers, and after monitoring, a synchronization signal and possibly accompanying signals are set by all subscribers for the abortion or continuation of a transaction.
    Type: Grant
    Filed: July 22, 1992
    Date of Patent: February 22, 1994
    Assignee: Siemens Nixdorf Informationssysteme AG
    Inventors: Juergen Kock, Peter Mooshammer, Wilfried Rottmann, Erich Taeuber
  • Patent number: 5278987
    Abstract: The present invention sorts very large volumes of data records by forming successive lists of sorted record start address by character rank from a LSD (least significant digit) of a sort field to a MSD (most significant digit) of such field with each list being formed in the order of the preceeding list. The present invention forms the lists by placing record start addresses in a collated list of virtual pockets wherein successive occurrences of like characters are linked to the next pocket memory position of such character so as to form the list in a memory requiring only the same number of addresses as there are records being sorted. The invention thus very materially reduces the size of pocket memory required for this type of data sorting.
    Type: Grant
    Filed: March 5, 1991
    Date of Patent: January 11, 1994
    Inventors: Franklin Chiang, Lawrence J. Thoman