Patents Examined by Larry D Donaghue
  • Patent number: 7191449
    Abstract: Described is a system and method for managing and displaying messages within a mobile device. The invention provides a method for centrally controlling data flow throughout the communication system. The invention provides a means to receive a message over a communications medium, identify a registered form to handle the message, and to pass it to the registered form for display.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: March 13, 2007
    Assignee: Microsoft Corporation
    Inventor: Gregory M. Burgess
  • Patent number: 7188183
    Abstract: Techniques for interacting with a client process on a mobile device connected to a network over a wireless link includes receiving a first request at a state machine executing on a first platform connected to the network. The first request is associated with the client process, and is for a service from an application. A first method of the application is invoked with first data in response to the first request. Second data for the client process is received from the application in response to invoking the first method. A first response is based on the second data. The first response is sent for the client process. The method includes managing information about a plurality of requests associated with the client process. The application executes on a second platform connected to the network. Both the first and second platforms are distinct from the mobile device.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: March 6, 2007
    Assignee: Oracle International Corporation
    Inventors: Jyotirmoy Paul, Jeff Barton, Anit Chakraborty, Siva Dirisala
  • Patent number: 7188186
    Abstract: A novel process and system for flexibly adding supplemental digital program content such as, for example, transactional advertising content, games, polls, contests, interactive music videos, and e-commerce content generally and the like, into pre-prepared digital media files, such as an MP3 audio file or the like, for playback by digital playback apparatus, wherein the pre--prepared media file is modified by embedding therein executable code representing such supplemental program content, and enabling the playback apparatus to decode and execute the presentation of the supplemental program material as an addition to the playback of the pre-prepared media file content.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: March 6, 2007
    Inventors: Thomas W. Meyer, Josslyn Motha Meyer
  • Patent number: 7185052
    Abstract: A meta content delivery network system provides a Meta CDN DNS (MCD) server that performs scheduling for multiple content delivery networks (CDN) and is authoritative for all domains given to the CI)Ns. The MCD contains information about CDNs which participate in each CDN domain names. Each CDN provides to the Meta CDN a domain name that will refer to their CDN's portion of the entire Meta CDN for that Meta CDN customer. The MCD receives domain name query requests from local DNSs and selects the proper CDN address based on a predefined capacity reservation of CDNs and statically mapped preferences for certain clients and directs the local DNS requests to the proper CDN address.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: February 27, 2007
    Assignee: Akamai Technologies, Inc.
    Inventor: Richard David Day
  • Patent number: 7181541
    Abstract: A host system is provided with one or more host-fabric adapters installed therein for connecting to a switched fabric of a data network.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: February 20, 2007
    Assignee: Intel Corporation
    Inventors: Tom E. Burton, Dominic J. Gasbarro, Brian M. Leitner
  • Patent number: 7177937
    Abstract: A web server computer system includes a virus checker and mechanisms for checking e-mails and their attachments, downloaded files, and web sites for possible viruses. The virus checker allows a web server to perform virus checking of different types of information real-time as the information is requested by a web client. In addition, a web client may also request that the server perform virus checking on a particular drive on the web client. If this case, the web server may receive information from the web client drive, scan the information for viruses, and inform the web client whether any viruses were found. In the alternative, the web server may download a client virus checker to the web client and cause the client virus checker to be run on the web client. The preferred embodiments thus eliminate the need for virus checking software to be installed on each web client.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: February 13, 2007
    Assignee: International Business Machines Corporation
    Inventors: Cary Lee Bates, Paul Reuben Day, John Matthew Santosuosso
  • Patent number: 7171669
    Abstract: The present invention provides providing predictable scheduling of programs using repeating precomputed schedules on discretely scheduled and/or multiprocessor operating systems. In one embodiment, a scheduler accesses an activity scheduling graph. The activity scheduling graph is comprised of nodes each representing a recurring execution interval, and has one root, one or more leaves, and at least one path from the root to each leaf. Each node is on at least one path from the root to a leaf, and the number of times the execution interval represented by each node occurs during the traversal of the graph is equal to the number of paths from the root to a leaf that the node is on. Each node has associated with it an execution interval length, and is adapted to being dedicated to executing the threads of a single activity. There may be one scheduling graph for each processor, or a scheduling graph may traverse multiple processors.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: January 30, 2007
    Assignee: Microsoft Corporation
    Inventors: Michael B. Jones, John Regehr
  • Patent number: 7171449
    Abstract: Methods and systems are provided for a three party mailing service. The process may enable a first party, such as an advertiser, to create a mailpiece, such as a postcard, marked with a unique code. The mailpiece may be provided to a second party, such as a household, who can send the mailpiece without adding any postage to the mailpiece. The mailpiece may then be delivered to a third party, and the first party may be billed for the postage due for delivery of the mailpiece from the second party to the third party.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: January 30, 2007
    Assignee: United States Postal Service
    Inventor: Lyn Seidler
  • Patent number: 7165102
    Abstract: To provide the quality and reliability of a fiber optic link over a wireless link, network nodes in accordance with the present invention include a link quality management unit, which controls multiple transmission parameters of a wireless interface in response variable link conditions. For example, the link quality management unit of one embodiment of the present invention controls transmission power, modulation, and error correction. In general, a receiving network node provides feedback to a transmitting network node. Thus, in many embodiments of the present invention, the link quality management unit includes a signal quality detector, which measures a signal quality value, such as bit error rate, signal to noise ratio, or error vector magnitude. The measured signal quality is transmitted back to the transmitting node so that appropriate changes can be made to the transmission parameters.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: January 16, 2007
    Assignee: Raza Microelectronics, Inc.
    Inventors: Tushar Ramanlal Shah, Chandrasekaran Nageswara Gupta, Addepalli Sateesh Kumar, Debaditya Mukherjee, Thomas Yat Chung Woo, Khalid Seikh, Hari Sarvotham Nallan Chakravarthula, Jai Prakash Agrawal
  • Patent number: 7162720
    Abstract: The present invention provides providing predictable scheduling of programs using repeating precomputed schedules on discretely scheduled and/or multiprocessor operating systems. In one embodiment, a scheduler accesses an activity scheduling graph. The activity scheduling graph is comprised of nodes each representing a recurring execution interval, and has one root, one or more leaves, and at least one path from the root to each leaf. Each node is on at least one path from the root to a leaf, and the number of times the execution interval represented by each node occurs during the traversal of the graph is equal to the number of paths from the root to a leaf that the node is on. Each node has associated with it an execution interval length, and is adapted to being dedicated to executing the threads of a single activity. There may be one scheduling graph for each processor, or a scheduling graph may traverse multiple processors.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: January 9, 2007
    Assignee: Microsoft Corporation
    Inventors: Michael B. Jones, John Regehr
  • Patent number: 7159100
    Abstract: The present invention provides extended precision in SIMD arithmetic operations in a processor having a register file and an accumulator. A first set of data elements and a second set of data elements are loaded into a first vector register and a second vector register, respectively. Each data element comprises N bits. Next, an arithmetic instruction is fetched from memory. The arithmetic instruction is decoded. Then, a first vector register and a second vector register are read from the register file. The present invention then executes the arithmetic instruction on corresponding data elements in the first and second vector registers. The result of the execution is then written into the accumulator. Then, each element in the accumulator is transformed into an N-bit width element and stored into the memory.
    Type: Grant
    Filed: December 30, 1998
    Date of Patent: January 2, 2007
    Assignee: MIPS Technologies, Inc.
    Inventors: Timothy van Hook, Peter Hsu, William A. Huffman, Henry P. Moreton, Earl A. Killian
  • Patent number: 7159014
    Abstract: A proxy implements automated version management of objects embedded in a document to eliminate/reduce network delays associated with requests to validate the objects in a browser (or other) cache. In an exemplary embodiment, the proxy obtains the document, assigns a unique URL to an embedded object, assigns an extended cache life to the object (via a header), updates the object's URL reference in the document, and sends the modified document to the user. When the user requests the object, the proxy obtains the object, attaches the new header, and transmits the object to the user. Because of its extended cache life, the object can subsequently be reused without time-consuming validation with the content server. In another embodiment, storage and validation of objects at the proxy (rather than at the cache) achieves reduced (and faster) validation while allowing refreshing prior to expiration.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: January 2, 2007
    Assignee: Fineground Networks
    Inventors: Balas Natarajan Kausik, Janardhanan Jawahar
  • Patent number: 7155524
    Abstract: A system for and method of implementing a backoff protocol and a computer network incorporating the system or the method. In one embodiment, the system includes: (1) a client subsystem that generates a request for access to a shared resource and (2) a server subsystem that receives the request, returns a LOCKED indicator upon an expectation that the shared resource is unavailable and otherwise returns a FREE indicator, the client subsystem responding to the LOCKED indicator by waiting before regenerating the request for the access.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: December 26, 2006
    Assignees: Lucent Technologies Inc., Hebrew University
    Inventors: Michael Kendrick Reiter, Gregory Chockler, Dahlia Malkhi
  • Patent number: 7155724
    Abstract: The present invention provides providing predictable scheduling of programs using repeating precomputed schedules on discretely scheduled and/or multiprocessor operating systems. In one embodiment, a scheduler accesses an activity scheduling graph. The activity scheduling graph is comprised of nodes each representing a recurring execution interval, and has one root, one or more leaves, and at least one path from the root to each leaf. Each node is on at least one path from the root to a leaf, and the number of times the execution interval represented by each node occurs during the traversal of the graph is equal to the number of paths from the root to a leaf that the node is on. Each node has associated with it an execution interval length, and is adapted to being dedicated to executing the threads of a single activity. There may be one scheduling graph for each processor, or a scheduling graph may traverse multiple processors.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: December 26, 2006
    Assignee: Microsoft Corporation
    Inventors: Michael B. Jones, John Regehr
  • Patent number: 7136926
    Abstract: As Internet packet flow increases, the demand for high speed packet filtering has grown. The present invention introduces a high-speed rule processing method that may be used for packet filtering. The method pre-processes a set of packet filtering rules such that the rules may be searched in parallel by a set of independent search units. Specifically, the rules are divided into N orthogonal dimensions that comprise aspects of each packet that may be examined and tested. Each of the N dimensions are then divided into a set of dimension rule ranges. Each rule range is assigned a value that specifies the rules that may apply in that range. The rule preprocessing is completed by creating a search structure to be used for classifying a packet into one of the rule ranges in each of the N dimensions. Each search structure may be used by an independent search unit such that all N dimensions may be searched concurrently.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: November 14, 2006
    Assignee: PMC-Sierrra US, Inc.
    Inventors: Raghunath Iyer, Sundar Iyer, Moti Jiandani, Ramana Rao
  • Patent number: 7133928
    Abstract: An overlay protocol and system for allowing multicast routing in the Internet to be performed at the application level. The overlay protocol uses “native” Internet multicast and multicast routing protocols to route information, according to overlay routing tables. Overlay groups are mapped to native multicast groups to exploit native multicasting in regional or local forwarding domains. Use of the overlay protocol allows overlay distribution to be handled in a more intelligent and bandwidth-managed fashion. Overlay routers are placed at each of several local area networks, Internet service provider's point of presence, enterprise, or other cohesively-managed locations. The overlay computers are configured according to bandwidth and security policies, and perform application-level multicast distribution across the otherwise disjoint multicast networks by using the overlay routing. The result is an overlay multicast network that is effectively managed according to local network management policies.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: November 7, 2006
    Assignee: Yahoo! Inc.
    Inventor: Steven McCanne
  • Patent number: 7130886
    Abstract: A system and method for providing secure message signature status and trust status indications are disclosed. When a secure message having a digital signature generated by a sender is selected for processing on a messaging client, the digital signature on the message and trust status of the sender are checked. Separate indications are then provided to indicate the results of checking the digital signature and the trust status of the sender.
    Type: Grant
    Filed: March 6, 2002
    Date of Patent: October 31, 2006
    Assignee: Research In Motion Limited
    Inventors: Herbert A. Little, Michael S. Brown, Neil P. Adams
  • Patent number: 7126375
    Abstract: A multiple level routing architecture for a programmable logic device having logical blocks, each logical block comprising a plurality of cells, with a first level routing resources coupling the cells of logical blocks. A second level routing resources coupling the first level routing resources through tab networks; each tab network comprises a first plurality of switches coupling the first level routing resources to an intermediate tab and the intermediate tab coupling the second level routing resources through a second plurality of switches, each switch may comprise an additional buffer. Repeated applications of tab networks provide connections between lower level routing resources to higher level routing resources.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: October 24, 2006
    Assignee: BTR, Inc.
    Inventors: Benjamin S. Ting, Peter M. Pani
  • Patent number: 7124188
    Abstract: A method and apparatus for robustly enhanced Class of Service (COS) at the application layer permits highly flexible privilege based access and enables implementation of complex policies and rules for classification and differentiation of services. Differentiation facilitates categorization of traffic to permit flexible design and implementation of multiple Class of Service levels.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: October 17, 2006
    Assignee: Network Appliance, Inc.
    Inventors: Krishna Mangipudi, Vijay Basani
  • Patent number: 7120915
    Abstract: A method and apparatus for implementing vertical multi-threading in a microprocessor without implementing additional signal wires in the processor has been developed. The method uses a pre-existing signal to serve as a multi-function signal such that the multi-function signal can be used for clock enable, clock disable, and scan enable functions. The single multi-function signal exhibits multiple functionalities as needed by a flip-flop to operate in a plurality of modes. The method allows for the use of a pre-existing signal wire to be used as a process thread switch signal that would otherwise have to be explicitly hard-wired in the absence of the multi-functioning signal. The method further includes allowing multiple-bit flip-flops to be placed at sequential stages in a pipeline in order to facilitate vertical multi-threading and, in effect, increase processor performance. The apparatus provides means for distinguishing between specific characteristics exhibited by the multi-function signal.
    Type: Grant
    Filed: November 20, 2000
    Date of Patent: October 10, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Gajendra P. Singh, Joseph I. Chamdani, Renu Raman, Rabin A. Sugumar