Patents Examined by Larry D Donoghue
  • Patent number: 6542921
    Abstract: The present invention provides a method and apparatus for controlling a processing priority assigned alternately to a first thread and a second thread in a multithreaded processor to prevent deadlock and livelock problems between the first thread and the second thread. In one embodiment, the processing priority is initially assigned to the first thread for a first duration. It is then determined whether the first duration has expired in a given processing cycle. If the first duration has expired, the processing priority is assigned to the second thread for a second duration.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: April 1, 2003
    Assignee: Intel Corporation
    Inventor: David J. Sager