Patents Examined by Leon-Viet Nguyen
  • Patent number: 9118277
    Abstract: Apparatus and methods for envelope tracking are disclosed. In one embodiment, a power amplifier system including a power amplifier and an envelope tracker is provided. The power amplifier is configured to amplify a radio frequency (RF) signal, and the envelope tracker is configured to control a supply voltage of the power amplifier using an envelope of the RF signal. The envelope tracker includes a buck converter for generating a buck voltage from a battery voltage and a digital-to-analog conversion (DAC) module for adjusting the buck voltage based on the envelope of the RF signal to generate the supply voltage for the power amplifier.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: August 25, 2015
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Florinel G. Balteanu, Sabah Khesbak, Yevgeniy A. Tkachenko, David Steven Ripley, Robert John Thompson
  • Patent number: 9112761
    Abstract: A device that may include a router and may also include narrowband generators arranged to generate samples of narrowband channels, a digital up converter (DUC). The DUC may include multiple DUC inputs. Different DUC inputs are associated with different frequency ranges. The router may include multiple router inputs, multiple router outputs and a routing circuit. The multiple router outputs are coupled to the multiple DUC inputs. The multiple router inputs are coupled to the narrowband generators. The routing circuit may include a re-sequencing memory module that is arranged to receive the samples of narrowband channels from the narrowband generator according to an input order and to output the samples of the narrowband channels to the multiple router outputs according to an output order that is responsive to an allocation of frequencies to the samples of the narrowband channels.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: August 18, 2015
    Assignee: Harmonic, Inc.
    Inventors: Ariel Zaltsman, Adi Bonen
  • Patent number: 9106485
    Abstract: A system and method for frequency-selective demodulation is presented. An input signal is received that is modulated by frequency shift keying (FSK) and encodes data at a first and second frequency. The input signal is supplied to a plurality of estimators that include a first estimator configured to detect a first signal at the first frequency, a second estimator configured to detect a second signal at the second frequency, a third estimator configured to detect a third signal at a third frequency, and a fourth estimator configured to detect a fourth signal at a fourth frequency. An output is generated indicating receipt of the data encoded at the first frequency or the second frequency based upon outputs of the first estimator, the second estimator, the third estimator, and the fourth estimator.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: August 11, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Khurram Waheed, Sreenivasa M. Nerayanuru
  • Patent number: 9100103
    Abstract: A master unit and a plurality of slave units perform a multi-hop communication. The plurality of slave units include hybrid slave units are configured to select at least one of wireless communication and power line carrier communication. One hybrid slave unit includes a function of reporting, to the other hybrid slave unit in which a hop number in the power line carrier communication between the one hybrid slave unit and the other hybrid slave unit is one, the minimum route cost when the wireless communication is used for a channel on an upper side. The one hybrid slave unit includes a function of adopting the power line carrier communication when a route cost reported by the other hybrid slave unit is smaller than the minimum route cost of the one hybrid slave unit, and otherwise adopting the wireless communication.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: August 4, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Yukio Okada
  • Patent number: 9099079
    Abstract: For generating a signal to be transmitted original information is encoded into a main channel and a side channel, wherein the side channel is more robust against channel influences than the main channel. On the receiver side, when the receive quality is above a threshold, which is necessitated to execute a successful decoding of the main channel, the main channel is reproduced. If the receive quality falls below this threshold, however, the side channel is reproduced which may have less bits than the main channel and which is a correspondingly lower quality representation of the original information than the main channel.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: August 4, 2015
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Gerald Schuller, Stefan Wabnik, Bernhard Grill, Alexander Zink
  • Patent number: 9100233
    Abstract: In an embodiment, a receiver comprises: a linear equalizer for receiving an input signal and outputting a partly equalized signal; a VGA (variable-gain amplifier) for receiving the partly equalized signal and outputting an amplitude-adjusted signal in accordance with a gain control signal; a non-uniform ADC (analog-to-digital converter) for receiving the amplitude-adjusted signal and outputting a digitized signal; and a DSP (digital signal processing) circuit for receiving the digitized signal and outputting a bit stream by performing a signal detection and establishing the gain control signal by performing an amplitude comparison. The non-uniform ADC has a lower precision when the amplitude-adjusted signal lies in a region where the signal detection is of a higher confidence, and has a higher precision when the amplitude-adjusted signal lies in a region where the signal detection is of a lower confidence. In an embodiment, the DSP circuit includes a decision feedback equalizer.
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: August 4, 2015
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Chia-Liang Lin
  • Patent number: 9094164
    Abstract: A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus generates a codeword, determines at least one puncture to the codeword based on allowing a legacy receiver to decode the codeword without knowledge of the at least one puncture, replaces each of the at least one puncture with a pilot, and transmits the codeword. The apparatus may also generate an IEEE 802.11 codeword having pilots in a first set of subcarriers, and puncture the codeword with additional pilots unknown to a legacy receiver in a second set of subcarriers. Accordingly, when an original set of pilot symbols is insufficient or inappropriately placed in a resource structure, a codeword may be transmitted with a new pilot structure capable of being decoded by legacy receivers not aware of the new pilot structure.
    Type: Grant
    Filed: April 17, 2012
    Date of Patent: July 28, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Sundar Subramanian, Xinzhou Wu, Quan Geng, Cyril Measson, Thomas J. Richardson, Junyi Li
  • Patent number: 9094079
    Abstract: Systems and methods are disclosed for compensating I-Q imbalance in a wireless receiver. The receiver may employ a quadrature downconverter configured to receive an RF signal input and output an in-phase component and a quadrature component at an IF, an IF rotation block configured to downconvert the in-phase and quadrature components to baseband and an I-Q correction block configured to compensate for an I-Q imbalance in the received signal, wherein the I-Q correction block is positioned downstream from the IF rotation block in the signal path. Performing the I-Q correction after conversion to baseband may allow the compensation calculations to operate at a reduced digital rate. Similarly, digitally adjusting the gain of the signal prior to I-Q compensation may reduce the number of bits that are manipulated during the compensation process. These features may represent significant efficiencies as compared to I-Q corrections performed at IF.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: July 28, 2015
    Assignee: Qualcomm Incorporated
    Inventors: Daniel Jose Fernandes Barros, Le Nguyen Luong, James Young Hurt, Yann Ly-Gagnon, Paul James Husted
  • Patent number: 9088405
    Abstract: A clock phase interpolator includes: a phase interpolation processing circuit configured to generate an interpolated clock signal whose phase is interpolated from a plurality of operation clock signals having different phases; a band adjustment element coupled to the phase interpolation processing circuit, and configured to adjust an operational frequency band of the phase interpolation processing circuit by changing a setting value of itself; and a control circuit coupled to the phase interpolation processing circuit, and configured to detect a transition state for a reference clock signal of the interpolated clock signal, and configured to control the setting value of the band adjustment element on the basis of the detected transition state.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: July 21, 2015
    Assignee: FUJITSU LIMITED
    Inventor: Hisakatsu Yamaguchi
  • Patent number: 9088395
    Abstract: Provided are a transmitter and a method for transmitting a data block in a wireless communication system. The method comprises the following steps: deciding the number of bits (s) and encoders (NES) to allocate to one axis of a signal constellation; encoding an information bit based on the s and the NES and generating a coded block; parsing the coded block based on the s and the NES and generating a plurality of frequency sub-blocks; and transmitting the plurality of frequency sub-blocks to a receiver.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: July 21, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jong Ee Oh, Min Ho Cheong, Sok Kyu Lee
  • Patent number: 9075628
    Abstract: Provided is an electronic system capable of dynamically switching a communication speed among a plurality of electronic devices connected in series. A first communication device and a second communication device are connected in series to a host controller. After controlling the communication speed of the second communication device to be a communication speed defined in advance, the host controller controls the communication speed of the first communication device to be the same communication speed as the communication speed of the second communication device.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: July 7, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kenji Kuroki, Keita Takahashi, Satoru Yamamoto, Takuya Hayakawa, Kuniyasu Kimura
  • Patent number: 9065499
    Abstract: Modulated signal A is transmitted from a first antenna, and modulated signal B is transmitted from a second antenna. As modulated signal B, modulated symbols S2(i) and S2(i+1) obtained from different data are transmitted at time i and time i+1 respectively. In contrast, as modulated signal A, modulated symbols S1(i) and S1(i)? obtained by changing the signal point arrangement of the same data are transmitted at time i and time i+1 respectively. As a result the reception quality can be changed intentionally at time i and time i+1, and therefore using the demodulation result of modulated signal A of a time when the reception quality is good enables both modulated signals A and B to be demodulated with good error rate performances.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: June 23, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Yutaka Murakami, Kiyotaka Kobayashi, Masayuki Orihashi, Akihiko Matsuoka
  • Patent number: 9054823
    Abstract: A networking device includes a plurality of network ports and a clock synchronizer. Each network port is configured to receive a respective signal over a respective physical medium. A selected network port is configured to recover a clock signal from the respective signal received by the selected network port. Each of the network ports is configured to be selectable as the selected network port. The clock synchronizer is configured to generate a transmit clock signal in response to the clock signal recovered by the selected network port. The selected network port is configured to transmit data over the respective physical medium according to a local clock signal generated by a clock signal generator local to the networking device. Each network port other than the selected network port is configured to transmit data over the respective physical medium according to the transmit clock signal generated by the clock synchronizer.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: June 9, 2015
    Assignee: Marvell World Trade Ltd.
    Inventor: Ozdal Barkan
  • Patent number: 9042432
    Abstract: An adaptive filter bank can be implemented on a PLC device to dynamically adapt to variations in notching requirements and the performance of the PLC medium. The PLC device can apply filter coefficients to one or more filter elements of the adaptive filter bank to generate one or more notched subcarriers in the PLC band. A performance measurement of one or more subcarriers in the PLC band can be determined and evaluated against corresponding performance measurement thresholds. For a given notched subcarrier, if the performance measurement of the corresponding subcarriers is not in accordance with the performance measurement threshold, updated filter coefficients for the filter element configured to generate the notched subcarrier can be determined based, at least in part, on the performance measurement of the one or more subcarriers. The filter coefficients of the filter element can then be updated using the updated filter coefficients.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 26, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Marc Walter Werner, Stefan Brueck, Lawrence Winston Yonge, III
  • Patent number: 9036689
    Abstract: A variable-precision distributed arithmetic (VPDA) multi-input multi-output (MIMO) equalizer is presented to reduce the size and dynamic power of 112 Gbps dual-polarization quadrature phase-shift-keying (DP-QPSK) coherent optical communication receivers. The VPDA MIMO equalizer compensates for channel dispersion as well as various non-idealities of a time-interleaved successive approximation register (SAR) based analog-to-digital converter (ADC) simultaneously by using a least mean square (LMS) algorithm. As a result, area-hungry analog domain calibration circuits are not required. In addition, the VPDA MIMO equalizer achieves 45% dynamic power reduction over conventional finite impulse response (FIR) equalizers by utilizing the minimum required resolution for the equalization of each dispersed symbol.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: May 19, 2015
    Assignee: TeraSquare Co., Ltd.
    Inventors: Hyeon Min Bae, Soon Won Kwon
  • Patent number: 9031161
    Abstract: An apparatus for a transmit end in a wireless communication system is provided. The apparatus includes at least one scrambler configured to scramble a transmission bit stream, wherein the at least one scrambler comprises, a first circulation unit configured to output, during one cycle, at least one bit for scrambling odd-numbered bits of the transmission bit stream and at least one bit for scrambling even-numbered bits of the transmission bit stream, a second circulation unit configured to output, during one cycle, at least one bit for scrambling odd-numbered bits of the transmission bit stream and at least one bit for scrambling even-numbered bits of the transmission bit stream, and operators configured to generate a scrambled bit stream, wherein each of the operators generates a scrambled bit using an input bit, an output bit from the first circulation unit and an output bit from the second circulation unit.
    Type: Grant
    Filed: October 11, 2013
    Date of Patent: May 12, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Chul Yoo, Bo-Rham Lee, Yun-Ju Kwon, Dong-Min Kim
  • Patent number: 9031167
    Abstract: A receiver is described. The receiver includes a filter configured to receive a quadrature phase shift keying (“QPSK”) signal. Further, the receiver includes an amplifier coupled with the filter. And, a QPSK decomposition filter is coupled with the amplifier. The QPSK decomposition filter is configured to generate a first BPSK signal based on the QPSK signal and a second BPSK signal based on the QPSK signal.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: May 12, 2015
    Assignee: Innophase Inc.
    Inventor: Yang Xu
  • Patent number: 9025685
    Abstract: A method of selecting a modulation and coding scheme (MCS) index in a wireless communication system is disclosed. More specifically, the method includes measuring a frequency selectivity of a receiving channel, selecting a MCS index having a coding rate below a prescribed coding rate threshold value if the measured frequency selectivity is greater than or equal to a specified frequency selectivity threshold, and selecting the MCS index having the coding rate above or equal to the prescribed coding rate threshold value if the measured frequency selectivity is less than the specified frequency selectivity threshold.
    Type: Grant
    Filed: October 29, 2013
    Date of Patent: May 5, 2015
    Assignee: LG Electronics Inc.
    Inventors: Jin Soo Choi, Min Seok Oh, Hyung Ho Park, Sung Ho Moon, Jae Hoon Chung, Doo Hyun Sung
  • Patent number: 9020083
    Abstract: The present invention is directed to data communication system and methods. More specifically, various embodiments of the present invention provide a communication interface that is configured to transfer data at high bandwidth using nDSQ format(s) over optical communication networks. In certain embodiments, the communication interface is used by various devices, such as spine switches and leaf switches, within a spine-leaf network architecture, which allows large amount of data to be shared among servers.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: April 28, 2015
    Assignee: Inphi Corporation
    Inventors: Jamal Riani, Sudeep Bhoja
  • Patent number: 9008206
    Abstract: The present invention relates to a receiving apparatus of a communication system, which comprises a receiving module, a selection unit, and a processing module. The receiving module receives an input signal and produces a first signal and a second signal. The phases of the first and the second signals are different. The selection unit receives the first and the second signals, and switches for outputting the first or the second signal. The processing module receives and processes the first and the second signals, and produces an output signal. Thereby, the present invention uses the selection unit for processing two phase signals via a set of channels. Thereby, circuit area and power consumption can be reduced, and hence achieving the purpose of saving cost.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: April 14, 2015
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ying-His Lin, Yi-Shao Chang, Yi-Chang Shih