Patents Examined by Lev Iwashko
  • Patent number: 7263576
    Abstract: One embodiment is a system for locating content on a storage system, in which the storage system provides a location hint to the host of where the data is physically stored, which the host can resubmit with future access requests. In another embodiment, an index that maps content addresses to physical storage locations is cached on the storage system. In yet another embodiment, intrinsic locations are used to select a storage location for newly written data based on an address of the data. In a further embodiment, units of data that are stored at approximately the same time having location index entries that are proximate in the index.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: August 28, 2007
    Assignee: EMC Corporation
    Inventor: Stephen Todd
  • Patent number: 7260695
    Abstract: A back-up power source and a back-up storage device are utilized to power a processor and a volatile memory device during a primary power failure. An emergency data-storage algorithm is invoked to create a table of modified data analogous to data residing in a non-volatile memory device associated with a different processor. This table of modified data is written to the back-up storage device.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: August 21, 2007
    Assignee: International Business Machines Corporation
    Inventors: Gary W. Batchelor, Michael T. Benhase, Carl E. Jones
  • Patent number: 7219197
    Abstract: A cache memory, comprising: a data storage capable of storing data which requires consistency of data with a main memory; and a storage controller which controls to store data which does not require consistency of data with said main memory in an arbitrary data region in said data storage.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: May 15, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsutomu Hatakeyama
  • Patent number: 7165161
    Abstract: A method and apparatus for balancing memory access latency and bandwidth is generally described. In accordance with one example embodiment of the invention, a method comprising determining at least one characteristic of a memory request, and selectively leaving an accessed memory page open after a memory access based, at least in part, on the at least one characteristic for the memory request, to balance memory access latency and bandwidth of a subsequent memory request(s).
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: January 16, 2007
    Assignee: Intel Corporation
    Inventors: Balaji Parthasarathy, David Smiley
  • Patent number: 7162571
    Abstract: One embodiment is a system for locating content on a storage system, in which the storage system provides a location hint to the host of where the data is physically stored, which the host can resubmit with future access requests. In another embodiment, an index that maps content addresses to physical storage locations is cached on the storage system. In yet another embodiment, intrinsic locations are used to select a storage location for newly written data based on an address of the data. In a further embodiment, units of data that are stored at approximately the same time having location index entries that are proximate in the index.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: January 9, 2007
    Assignee: EMC Corporation
    Inventors: Michael Kilian, Stephen Todd, Tom Teugels, Jan Van Riel, Carl D'Halluin
  • Patent number: 7159096
    Abstract: A method and apparatus to perform memory management are described.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: January 2, 2007
    Assignee: Marvell International Ltd.
    Inventors: Moinul H. Khan, Priya N. Vaidya
  • Patent number: 7159070
    Abstract: One embodiment is a system for locating content on a storage system, in which the storage system provides a location hint to the host of where the data is physically stored, which the host can resubmit with future access requests. In another embodiment, an index that maps content addresses to physical storage locations is cached on the storage system. In yet another embodiment, intrinsic locations are used to select a storage location for newly written data based on an address of the data. In a further embodiment, units of data that are stored at approximately the same time having location index entries that are proximate in the index.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: January 2, 2007
    Inventors: Michael Kilian, Stephen Todd
  • Patent number: 7159086
    Abstract: A Simple Device for creating exact copies of computer long-term memory devices such as hard drives and compact flash memory. Our current invention is a stand-alone device. A user connects a long-term memory device he desires to make a copy of (source) to our device. The user also connects a long-term memory device to receive this copy (destination). Our device contains logic and circuitry, which perform operations on both the source and destination device to make an exact copy of the Source Data to the Destination Device, while protecting the Source device from any changes. Our device has a very simple user interface. This simplified user interface makes it difficult and unlikely to use our device incorrectly.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: January 2, 2007
    Inventors: Steven Bress, Mark Joseph Menz
  • Patent number: 7155595
    Abstract: A storage device controlling apparatus includes: a plurality of channel controllers having a circuit board on which are formed a file access processing section receiving requests to input and output data in files as units from an information processing apparatus and an I/O processor outputting I/O requests corresponding to the requests to input and output data to a storage device; and a disk controller executing input and output of data into and from the storage device in response to the I/O requests sent from the I/O processors. In the storage device controlling apparatus, the disk controller performs a replication management processing whereby data is also written into a second logical volume to store a copy of the data in the second logical volume, when the data is written into a first logical volume.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: December 26, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Yutaka Takata, Shinichi Nakayama, Hiroshi Ogasawara, Jinichi Shikawa, Nobuyuki Saika
  • Patent number: 7143248
    Abstract: A restoring device provides a means to reset data in a computer long-term storage device's controller, such as hard drives. There is a need to, on occasion, change information on a device's controller. For example to access data on long-term storage devices such as hard drives that is hidden. Accessing this hidden data involves making a change to a device's controller. There is an addition requirement, on occasion, to reset the device's controller to its original state. Our current invention has systems and methods to restore a long-term storage device controller to a previous state.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: November 28, 2006
    Inventors: Steven Bress, Mark Joseph Menz, Daniel Bress, Michael James Menz
  • Patent number: 7130981
    Abstract: A scanning manager (101) dynamically resizes (205) a flow scanning cache (109) based on signature (105) content in order to scan a flow (103) for signatures (105). The scanning manager (101) reads a directive (107) in a signature (105) to resize (205) the cache (109) in order to scan the flow (103) for the signature (105). The scanning manager (101) dynamically resizes (205) the cache (109) responsive to the directive (107), and scans for the signature (105) within the resized cache (109).
    Type: Grant
    Filed: April 6, 2004
    Date of Patent: October 31, 2006
    Assignee: Symantec Corporation
    Inventor: Carey Nachenberg
  • Patent number: 7130963
    Abstract: A system for instruction memory storage and processing in a computing device having a processor, the system is based on backwards branch control information and comprises a dynamic loop buffer (DLB) which is a tagless array of data organized as a direct-mapped structure; a DLB controller having a primary memory unit partitioned into a plurality of banks for controlling the state of the instruction memory system and accepting a program counter address as an input, the DLB controller outputs distinct signals. The system further comprises an address register located in the memory of the computing device, it is a staging register for the program counter address and an instruction fetch process that takes two cycles of the processor clock; and a bank select unit for serving as a program counter address decoder to accept the program counter address and to output a bank enable signal for selecting a bank in a primary memory unit, and a decoded address for access within the selected bank.
    Type: Grant
    Filed: July 16, 2003
    Date of Patent: October 31, 2006
    Assignee: International Business Machines Corp.
    Inventors: Sameh W. Asaad, Jaime H. Moreno, Jude A. Rivers, John-David Wellman
  • Patent number: 7127569
    Abstract: An information handling system (IHS) is provided that permits continued recording of a medium when a planned power loss occurs while the medium is being recorded in a media drive. If a low power condition is encountered during recording, the IHS saves location information regarding a last written block prior to the planned power loss. When power is restored, recording resumes at a location related to the location information.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: October 24, 2006
    Assignee: Dell Products L.P.
    Inventors: Hong-Jing Lo, Jason Goertz
  • Patent number: 7120753
    Abstract: A system and method for dynamically altering a Virtual Memory Manager (VMM) Sequential-Access Read Ahead settings based upon current system memory conditions is provided. Normal VMM operations are performed using the Sequential-Access Read Ahead values set by the user. When low memory is detected, the system either turns off Sequential-Access Read Ahead operations or decreases the maximum page ahead (maxpgahead) value based upon whether the amount of free space is simply low or has reached a critically low level. The altered VMM Sequential-Access Read Ahead state remains in effect until enough free space is available so that normal VMM Sequential-Access Read Ahead operations can be performed (at which point the altered Sequential-Access Read Ahead values are reset to their original levels).
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: October 10, 2006
    Assignee: International Business Machines Corporation
    Inventors: Jos Manuel Accapadi, Andrew Dunshea, Li Li, Grover Herbert Neuman, Mysore Sathyanarayana Srinivas, David Alan Hepkin
  • Patent number: 7103746
    Abstract: Embodiments of the present invention may provide a method of sparing and removing pinned or interleaved memory. When a memory device failure is predicted in a device containing pinned memory, a request may be made for the de-allocation of a freeable memory range 304. When the request for de-allocating the freeable range of memory is accepted 306, the memory data from the failing memory device may be copied to one or more de-allocated memory devices 308. Requests directed to the failing memory device may be re-routed to the replacement memory device(s) 310 and the memory without the deactivated memory device 312 may be re-interleaved.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: September 5, 2006
    Assignee: Intel Corporation
    Inventor: Stanley S. Kulick
  • Patent number: 7099988
    Abstract: A method to read (N) sequential files written to an information storage medium, and then skip the next (M) sequential files. The method initially identifies the (M) files to be skipped. After identifying the (M) files to be skipped, the method reads the (N) files.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: August 29, 2006
    Assignee: International Business Machines Corporation
    Inventors: Kirby G. Dahman, Glen A. Jaquette