Patents Examined by Lilian Vo
  • Patent number: 6971103
    Abstract: A multithreaded processor includes an interrupt controller for processing a cross-thread interrupt directed from a requesting thread to a destination thread. The interrupt controller in an illustrative embodiment receives a request for delivery of the cross-thread interrupt to the destination thread, determines whether the destination thread of the cross-thread interrupt is enabled for receipt of cross-thread interrupts, and utilizes a thread identifier to control delivery of the cross-thread interrupt to the destination thread if the destination thread is enabled for receipt of cross-thread interrupts. The requesting thread requests delivery of the cross-thread interrupt to the destination thread by setting a corresponding interrupt pending bit in a flag register of the multithreaded processor. The destination thread is enabled for receipt of cross-thread interrupts if a corresponding enable bit is set in an enable register of the multithreaded processor.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: November 29, 2005
    Assignee: Sandbridge Technologies, Inc.
    Inventors: Erdem Hokenek, Mayan Moudgill, Sean M. Dorward
  • Patent number: 6957431
    Abstract: The present invention provides a method, system, and computer program product for improving scheduling of tasks in systems that accumulate execution time. An upper bound is computed on the amount of additional time each schedulable task in the system may continue to execute after exceeding its predetermined cost, without adversely affecting overall operation of the system (that is, ensuring that the continued execution will not cause invocations of subsequent tasks to fail to meet their execution deadlines). By allowing tasks to run longer, the potential that the task will successfully end is increased, thereby yielding a more efficient overall system. In the preferred embodiment, the extensions are iteratively computed as a fixed percentage of the cost of each task until reaching an amount of time where the system is no longer feasible.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: October 18, 2005
    Assignee: International Business Machines Corporation
    Inventors: Gregory Bollella, Peter F. Haggar, James A. Mickelson, David M. Wendt
  • Patent number: 6952826
    Abstract: A method for implementing a multi-level system model for deterministically handling selected data comprises a picokernel module that invokes an isochronous scheduler to select, schedule, and execute active isochronous processes on an electronic device in response to a cycle start signal from an isochronous clock. The active isochronous processes may selectively set plesiochronous flags to thereby designate corresponding plesiochronous processes as active plesiochronous processes. Once all active isochronous processes have been executed in a given isochronous cycle, then the picokernel may invoke a plesiochronous scheduler to select, schedule, and execute any active plesiochronous processes on the electronic device.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: October 4, 2005
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Scott D. Smyers, Bruce A. Fairman, Glen D. Stone, Harold A. Ludtke
  • Patent number: 6948047
    Abstract: A general purpose computer apparatus including a central processing unit, a main memory and a system bus. The general purpose computer apparatus further includes means for interfacing the central processing unit to the system bus and means for interfacing the central processing unit to an I/O bus. A housing encloses the central processing unit, the main memory and the means for interfacing, with the housing having a mechanical form factor corresponding to a disk drive housing.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: September 20, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: David William Maruska, Jonathan Clark Crowell
  • Patent number: 6925641
    Abstract: A highly intelligent DSP load management system is described herein for enhancing the processing capabilities of an SOC device. The DSP load management system enables parallel processing of data at high frequency and distributes, reads and writes data to several CPUs and/or DSPs in the same clock cycle. In addition, the DSP load management system provides forward looking real-time evaluation of arriving data and diverts tasks from one DSP to another, with short or zero latency. The DSP load management system is interfaced between one or more CPUs, one or more DSPs and/or a memory management system for enabling parallel processing of data at high frequency.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: August 2, 2005
    Assignee: Xronix Communications, Inc.
    Inventor: Hammam Elabd
  • Patent number: 6915518
    Abstract: A system and method for allocating resources of programmable logic devices (PLDs) according to activity level. In various embodiments, the activity levels of functions implemented on the PLDs are monitored. When decreasing and/or increasing activity levels are detected, the PLD resources are reallocated between the various functions in proportion to the decreasing and/or increasing activity levels.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: July 5, 2005
    Assignee: Xilinx, Inc.
    Inventor: Neil G. Jacobson
  • Patent number: 6907607
    Abstract: A system and method for projecting capacity of computer resources for a plurality of processing systems in a processing environment and for adjusting workload among said systems to improve resource utilization. An administrative processor determines the projected usage of computer resources for a plurality of computer systems in a processing environment by representing the capacity of each of the plurality of computer systems in a normalized unit and by sorting the capacities of the computer systems by the normalized or standardized units. The standardized unit, optimally time as measured as the life expectancy of each different resource of the computer system, is used for the N-axes of the N-dimensional space called a capacity space. Each computer system is mapped to a point in the capacity space, which normalizes configuration and capacity differences between systems by expressing the usage of all resources in the units of time.
    Type: Grant
    Filed: October 17, 2000
    Date of Patent: June 14, 2005
    Assignee: International Business Machines Corporation
    Inventors: Lily Barkovic Mummert, William G. Pope
  • Patent number: 6904594
    Abstract: A method and system for monitoring performance of a program using global metric variables to provide the support in an symmetric multiprocessor (SMP) system. A Java virtual machine (Jvm) either calls the profiler whenever bytes are allocated or provides an interface to allow the profiler to determine the value of the change in the metric for the current thread. The profiler then applies the changes to a metric for the current thread. Alternatively, per processor data areas are maintained for storing per processor metric values. Whenever a thread switch occurs or there is a request for the metric on a specified thread, an operating system kernel updates the thread level metric values with changes in the values per processor metrics.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: June 7, 2005
    Assignee: International Business Machines Corporation
    Inventors: Robert Francis Berry, John Day Howard, Frank Eliot Levine, Robert J. Urquhart
  • Patent number: 6883171
    Abstract: A multi-tasking operating system and method updates PCI address values in an extension register to ensure that various threads utilize the correct values when accessing peripheral PCI devices. When application program threads require access to a PCI device, the operating system writes the high order bits of the PCI device address to two places: (1) the extension register of the PCI host bridge to allow immediate addressing of the PCI device, and (2) separate memory locations associated with the threads. When a context switch occurs from a first thread to a second thread, the operating system retrieves the stored value from the memory location associated with the second thread and writes the value to the extension register. In this manner, when the second thread requires access to its PCI device, the proper address value is already located in the extension register.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: April 19, 2005
    Assignee: Microsoft Corporation
    Inventors: Ray A. Bittner, Jr., Michael Ginsberg
  • Patent number: 6877158
    Abstract: A method, system, and apparatus for mediating address translation in a logically partitioned data processing system is provided. In one embodiment, a firmware component receives from an operating system within a logical partition a request to access a physical resource. The firmware component, responsive to a determination that the physical resource has been allocated to the logical partition, modifies an address translation table, if necessary, to allow access to the physical resource by the operating system. The operating system is prevented from directly modifying the address translation table, thus preventing potential interference between operating systems within the logically partitioned data processing system.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: April 5, 2005
    Assignee: International Business Machines Corporation
    Inventor: Richard Louis Arndt
  • Patent number: 6865576
    Abstract: A database schema for storing application data in a relational database backing store of a directory service. The application data has at least some entries with multiple value attributes. According to the invention, the application data is profiled to determine how it may be optimally stored in the backing store. Preferably, single entries having single value attributes are stored in a merged attribute table, while entries having multiple value attributes are stored in per attribute tables. According to the optimization, a majority of the attributes are single valued and are stored in the merged table, and the per attribute tables thus store a relatively smaller number of exceptions. This database schema enhances processing of conventional directory service queries into the backing store.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: March 8, 2005
    Assignee: International Business Machines Corporation
    Inventors: Shia-San Gong, Rodolfo Augusto Mancisidor, Chetan Ram Murthy, Shaw-Ben Shi
  • Patent number: 6854114
    Abstract: Techniques are provided for instantiating separate Java virtual machines for each session established by a server. Because each session has its own virtual machine, the Java programs executed by the server for each user connected to the server are insulated from the Java programs executed by the server for all other users connected to the server. The separate VM instances can be created and run, for example, in separate units of execution that are managed by the operating system of the platform on which the server is executing. For example, the separate VM instances may be executed either as separate processes, or using separate system threads. Because the units of execution used to run the separate VM instances are provided by the operating system, the operating system is able to ensure that the appropriate degree of insulation exists between the VM instances.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: February 8, 2005
    Assignee: Oracle International Corp.
    Inventors: Harlan Sexton, David Unietis, Mark Jungerman, Scott Meyer, David Rosenberg
  • Patent number: 6842901
    Abstract: An apparatus and method of managing memory utilized by a process executing on a computer system with an operating system frees memory segments allocated to threads (in the process) if it is determined that such threads have stopped operating. To that end, messages forwarded between the process and operating system are intercepted. The location of a memory segment that is allocated to a given thread in the process then is ascertained from at least one of the intercepted messages. The given thread thus is monitored and its allocated memory segment is freed if it is determined that the given thread has stopped operating.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: January 11, 2005
    Assignee: Nortel Networks Limited
    Inventor: William Miller
  • Patent number: 6829763
    Abstract: The invention is a method and apparatus for repetitively executing a plurality of software packages at a plurality of rates utilizing a common set of computational resources. The method consists of counting contiguous time increments and executing a plurality of software packages. Each software package is executed during each time increment in one or more sequences of time increments. The time increments in each sequence recur at a predetermined rate, and the time increments assigned to one software package do not overlap the time increments assigned to any other of the plurality of software packages.
    Type: Grant
    Filed: May 16, 2000
    Date of Patent: December 7, 2004
    Assignee: Litton Systems, Inc.
    Inventors: John G. Mark, Daniel A. Tazartes, Jonathan A. Lincoln, Philip T. Kent
  • Patent number: 6826753
    Abstract: A method and apparatus are provided for managing work granules being executed in parallel. A task is evenly divided between a number of work granules. The number of work granules falls between a threshold minimum and a threshold maximum. The threshold minimum and maximum may be configured to balance a variety of efficiency factors affected by the number of work granules, including workload skew and overhead incurred in managing larger number of work granules. Work granules are distributed to processes on nodes according to which of the nodes, if any, may execute the work granule efficiently. A variety of factors may used to determine where a work granule may be performed efficiently, including whether data accessed during the execution of a work granule may be locally accessed by a node.
    Type: Grant
    Filed: October 7, 1999
    Date of Patent: November 30, 2004
    Assignee: Oracle International Corporation
    Inventors: Benoit Dageville, Patrick A. Amor
  • Patent number: 6826752
    Abstract: A structured multithreaded programming system is described for integrated use with existing and new programming languages and systems. The structured multithreaded programming system enables programs to be developed which include both multithreaded and multithreadable code constructs. The multithreaded code constructs require explicitly concurrent execution. The multithreadable code constructs can be executed either sequentially or concurrently, at the selection of the programmer or computer user. When executed concurrently, the different threads of execution in a multithreaded program developed with this system can be synchronized using innovative synchronization objects. One type of synchronization object is a special type of counter, which can be constrained to be monotonically increasing in value. Another related type of synchronization object is a special type of flag, which can be constrained to have its value set monotonically.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: November 30, 2004
    Assignee: California Institute of Technology
    Inventors: John Thornley, K. Mani Chandy, Hiroshi Ishii
  • Patent number: 6823508
    Abstract: Software programs, such as an operating system or other application programs, are automatically customized to a specific user(s) based on data corresponding to the specific user(s) that is maintained in a user information store. In one embodiment, the information store is a unified store that is accessible by multiple programs including the operating system. Thus, new information or information changes can be made available to multiple programs by the user adding (or changing) the information only once. In another embodiment, the operating system image to be installed on a computer is pre-populated with user-specific information at the factory. The user-specific information can be integrated into the operating system at the factory or alternatively upon an initial boot of the computer by the user.
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: November 23, 2004
    Assignee: Microsoft Corporation
    Inventors: Ryan Burkhardt, Tom G. Yaryan, Seetharaman Harikrishnnan, Donald J. McNamara, David J. D'Souza, Nicholas R. Legget, David Scott Johnson, Seung-Yup Chai
  • Patent number: 6823376
    Abstract: A method and system for capturing and storing system changes for application to multiple users and systems in a heterogeneous server environment is provided. A data processing system is initialized for a capture of an initial state of the data processing system. The data processing system is modified. The modified state of the data processing system is captured. The differences between the initial state and the modified state are stored as a set of configuration parameters in a depository, and the set of configuration parameters may be used to manage configurability of a data processing system within the distributed data processing system.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: November 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Randall M. George, Brian Keith Howe, Stanley Allen Smith
  • Patent number: 6804815
    Abstract: A sequence control mechanism enables out-of-order processing of contexts by processors of a symmetric multiprocessor system having a plurality of processors arrayed as a processing engine. The processors of the engine are preferably arrayed as a plurality of rows or clusters embedded between input and output buffers, wherein each cluster of processors is configured to process contexts in a first in, first out (FIFO) synchronization order. However, the sequence control mechanism allows out-of-order context processing among the clusters of processors, while selectively enforcing FIFO synchronization ordering among those clusters on an as needed basis, i.e., for certain contexts. As a result, the control mechanism reduces undesired processing delays among those processors.
    Type: Grant
    Filed: September 18, 2000
    Date of Patent: October 12, 2004
    Assignee: Cisco Technology, Inc.
    Inventors: Darren Kerr, Jeffery B. Scott, John William Marshall, Kenneth H. Potter, Scott Nellenbach
  • Patent number: 6782408
    Abstract: The number of instances of an application running in a computing environment are controlled by monitoring the current load on the application, and altering the current number of instances of the application based on results of the monitoring. The load may be monitored by monitoring the current number of instances of the application running in the computing environment. Where a maximum, minimum and/or initial number on startup, of instances of the application are specified, the altering is done based on comparing the current number to one or more of the specified numbers of instances.
    Type: Grant
    Filed: March 30, 1999
    Date of Patent: August 24, 2004
    Assignee: International Business Machines Corporation
    Inventors: Tushar Deepak Chandra, Sameh Afif Fakhouri, Liana Liyow Fong, William Francis Jerome, Srirama Mandyam Krishnakumar, Vijay Krishnarao Naik, John Arthur Pershing, Jr., John Joseph Edward Turek