Patents Examined by Loan Truong
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Patent number: 8966315Abstract: While system-directed checkpointing can be implemented in various ways, for example by adding checkpointing support in the memory controller or in the operating system in otherwise standard computers, implementation at the hypervisor level enables the necessary state information to be captured efficiently while providing a number of ancillary advantages over those prior-art methods. This disclosure details procedures for realizing those advantages through relatively minor modifications to normal hypervisor operations. Specifically, by capturing state information in a guest-operating-system-specific manner, any guest operating system can be rolled back independently and resumed without losing either program or input/output (I/O) continuity and without affecting the operation of the other operating systems or their associated applications supported by the same hypervisor.Type: GrantFiled: February 14, 2013Date of Patent: February 24, 2015Assignee: O'Shantel Software L.L.C.Inventors: Donald D. Burn, Jack Justin Stiffler
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Patent number: 8438423Abstract: Technologies are described herein for allowing a computer system to recover from an invalid configuration, without requiring any modifications to the hardware of the computer system by the user. The computer determines whether a boot-fail counter exceeds a threshold value. If the boot-fail counter exceeds the threshold value, the computer executes an exception processing routine. In one aspect, the exception processing routine causes the computer to reset configuration settings stored in a memory area of the computer to default configuration settings. If the boot-fail counter does not exceed the threshold value, the computer increments the boot-fail counter and executes system initialization routines for booting the computer. Upon successfully completing the system initialization routines, the computer resets the boot-fail counter.Type: GrantFiled: March 31, 2009Date of Patent: May 7, 2013Assignee: American Megatrends, Inc.Inventor: Jonathan Bret Barkelew
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Patent number: 8127178Abstract: An image forming apparatus includes a process execution unit which processes data input to a storage area by using the attribute of a process set in the storage area, an error event generation unit which generates an error event to execute an error process when an error is detected during execution of the process by the process execution unit, and an error process execution unit which executes an error process associated with the storage area in accordance with the error event generated by the error event generation unit.Type: GrantFiled: January 24, 2008Date of Patent: February 28, 2012Assignee: Canon Kabushiki KaishaInventor: Takafumi Mizuno
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Patent number: 8117486Abstract: Methods and systems for detecting one or more anomalous devices are disclosed. For each of a plurality of devices, semi-structured data may be received from the device. For each pair of devices, of the plurality of devices, a similarity measurement may be determined between semi-structured data from a first device of the pair of devices and semi-structured data from a second device of the pair of devices. One or more anomalous devices may then be identified and one or more remedial actions may be performed for the one or more identified anomalous devices.Type: GrantFiled: April 10, 2007Date of Patent: February 14, 2012Assignee: Xerox CorporationInventor: John C. Handley
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Patent number: 8042003Abstract: Provided are a method and apparatus for evaluating the effectiveness of a test case used for a program test on the basis of error detection capability. The method includes: receiving a target program used for evaluating the effectiveness of the test case; generating an error program by inputting errors to the target program; detecting the errors by executing the test case on the generated error program; and calculating evaluation points of the test case using a ratio of the number of the detected errors to the number of the input errors. Thus, the capability of the test case used for a program test to detect errors can be evaluated.Type: GrantFiled: June 11, 2008Date of Patent: October 18, 2011Assignee: Electronics and Telecommunications Research InsituteInventors: Yu Seung Ma, Duk Kyun Woo
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Patent number: 8032793Abstract: In a method of controlling an information processing system in which an information processing device is connected to each of a plurality of input/output ports provided in a routing device and having a first property or a second property, for conducting data transmission among the information processing devices via the routing device, a step of causing all of the information processing devices to halt data transmission, a step of resetting properties and identification information of the input/output ports with the second properties other than the input/output port with the first property which cannot be used, in the routing device, and a step of causing the information processing devices to restart the data transmission after the reset of the identification information are executed.Type: GrantFiled: September 29, 2005Date of Patent: October 4, 2011Assignee: Fujitsu LimitedInventors: Terumasa Haneda, Yuichi Ogawa, Yuuji Hanaoka, Toshiyuki Yoshida, Hidenori Takahashi
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Patent number: 8024608Abstract: Under the present invention, a configurable dictionary is provided. The configurable dictionary includes a set of objects that identify: (1) attribute conditions of the computer system to be checked; (2) associated locations within the computer system for checking the attribute conditions; and (3) actions to be taken based on results of the checks for the computer system. The health of the computer system is checked by processing the set of objects in the configurable dictionary. Specifically, the attribute conditions identified in the configurable dictionary are checked at their associated locations, and any necessary action are implemented.Type: GrantFiled: March 5, 2008Date of Patent: September 20, 2011Assignee: International Business Machines CorporationInventors: Gordan Greenlee, Victoria Hanrahan-Locke, James A. Martin, Jr., Douglas G. Murray
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Patent number: 8015430Abstract: In one embodiment, a computer accessible medium stores a plurality of instructions including instructions which, when executed: track dependencies among a plurality of assets; and responsive to an identification of an asset for potential recovery (the “selected asset”), identify an asset dependency set corresponding to the selected asset. The asset dependency set comprises at least a subset of the plurality of assets, wherein each asset in the subset has a dependency with the selected asset. In some embodiments, one or more of the following may be provided: tracking asset dependencies and presenting the asset dependency set to the user; pruning the asset dependency set to a recovery set identifying the asset dependency set; generating the recovery order (optionally optimized); initiating the recovery according to the recovery order; performing recovery steps; generating the recovery plan and/or executing recovery plans.Type: GrantFiled: May 1, 2008Date of Patent: September 6, 2011Assignee: Symantec Operating CorporationInventors: Branka Rakic, Steven Kappel, Guido Westenberg, Shelley A. Schmokel, Peter A. Barber, Richard L. Harrison
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Patent number: 8015448Abstract: A storage controller including a first controller. The first controller includes a memory module, a test access port controller, the test access port controller configured to control a built in self-test operation on the memory module, and a register configured to store a first instruction. In response to the storage controller detecting a test access port interface being accessible to the storage controller, the test access port controller is configured to control the built in self-test operation on the memory module of the first controller by having either (i) a second instruction sent from the test access port controller to the first controller or (ii) the first instruction sent from the register to the first controller. The first controller is configured to perform the built in self-test operation on the memory module in response to having received the first instruction or having received the second instruction.Type: GrantFiled: June 19, 2007Date of Patent: September 6, 2011Assignee: Marvell International Ltd.Inventor: Dinesh Jayabharathi
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Patent number: 8001422Abstract: A new service, or new version of an existing service, can be tested using actual production requests and services. A request received by a production service, along with the response generated by the production service, is forwarded to a shadow service. The shadow service forwards the request to the new service, which generates a test response and sends the test response back to the shadow service. The shadow service utilizes a comparison engine operable to compare the responses for significant differences. Any significant differences can be logged, reported on, or added to statistics for the new service being tested.Type: GrantFiled: June 30, 2008Date of Patent: August 16, 2011Assignee: Amazon Technologies, Inc.Inventors: Vanessa Y. Sun, Neeraj Agrawal
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Patent number: 7996721Abstract: A method and system for a process monitor using a hardware communication format is described. The system includes a process monitor and a hardware device to send and/or receive messages in a hardware communication format to a management server. Hardware communication formatted messages are sent to a management server when an unexpected event occurs with the processes running on the system. The management server may respond with a command to perform an action on the system.Type: GrantFiled: April 27, 2005Date of Patent: August 9, 2011Assignee: Intel CorporationInventor: Hao Zhou
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Patent number: 7996724Abstract: A system and method for logging and storing failure analysis information on disk drive so that the information is readily and reliably available to vendor customer service and other interested parties is provided. The information, in an illustrative embodiment, is stored on a nonvolatile (flash) random access memory (RAM), found generally in most types of disk drives for storage of updateable disk drive firmware. A known location of limited size is defined in the flash RAM, to form a scratchpad. This scratchpad is a blank area of known addresses, formed during the original firmware download onto the memory, and which is itself free of firmware code. This scratchpad is sufficient in size to write a series of failure codes in a non-erasable list as failures/errors (and user/administrator attempts to unfail the disk) are logged.Type: GrantFiled: March 27, 2008Date of Patent: August 9, 2011Assignee: NetApp, Inc.Inventors: Douglas W. Coatney, Scott D. Gillette
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Patent number: 7996710Abstract: A method is provided for managing defects in a semiconductor memory system having a plurality of addressable locations. In the method, a first plurality of the addressable locations is allocated as in-use locations, and a second plurality of the addressable locations is allocated as spare locations. A plurality of sets of the in-use locations, wherein each of the sets is associated with a memory defect, is determined. At least one of the sets includes a different number of in-use locations than another of the sets. Each of the sets of the in-use locations is associated with at least one corresponding set of the spare locations. Each of a plurality of data requests that is associated with one of the sets of the in-use locations is directed to the at least one corresponding set of the spare locations.Type: GrantFiled: April 25, 2007Date of Patent: August 9, 2011Assignee: Hewlett-Packard Development Company, L.P.Inventors: Dheemanth Nagaraj, Larry J. Thayer
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Patent number: 7966518Abstract: A method for repairing a neighborhood of rows in a memory array using a patch table is disclosed. First data to be stored in row N in a memory array of the memory device, second data, if any, stored in row N?1 in the memory array, and third data, if any, stored in row N+1 in the memory array are stored in a temporary storage area of a memory device. The first data is written in row N, and, in response to an error, the first data, the second data, if any, and the third data, if any, are written in respective rows in a repair area in the memory device. The addresses of rows N?1, N, and N+1 are added to a table stored in the memory device to indicate which rows in the repair area should be used instead of rows N?1, N, and N+1.Type: GrantFiled: May 15, 2007Date of Patent: June 21, 2011Assignee: SanDisk CorporationInventors: Derek J. Bosch, Christopher S. Moore
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Patent number: 7962788Abstract: Automated tools to validate a system environment for an application (and/or any other type of software component) and/or repair system environment conditions that might prevent the proper installation and/or functioning of the application or component are presented. Such tools can facilitate the installation and/or upgrade of software by automating the process of ensuring that all necessary requirements for the proper functioning of the software have been met.Type: GrantFiled: April 23, 2007Date of Patent: June 14, 2011Assignee: Oracle International CorporationInventors: Gaurav Manglik, Bharat Paliwal, Vishwanath S. Sastry
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Patent number: 7962787Abstract: A method, and a system of using the method, of preserving memory of a processor powered by an external source. The method includes determining a drop in a first power to be supplied to the processor, generating a reset signal when the drop falls below a threshold, supplying a second power from a power store to the processor based on the reset signal, and holding the reset signal until the first power rises above the threshold.Type: GrantFiled: January 29, 2008Date of Patent: June 14, 2011Assignee: Robert Bosch GmbHInventors: Paul M. Camilleri, Jerry A. Gohl
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Patent number: 7958390Abstract: A memory device for repairing a neighborhood of rows in a memory array using a patch table is disclosed. In one embodiment, circuitry in the memory device is operative to store, in a temporary storage area of the memory device, (i) first data to be stored in row N in the memory array, (ii) second data, if any, stored in row N?1 in the memory array, and (iii) third data, if any, stored in row N+1 in the memory array. The circuitry is operative to write the first data in row N in the memory array, and, in response to an error in writing the first data, to write the first data, the second data, if any, and the third data, if any, in respective rows in a repair area in the memory device. The circuitry is further operative to add the addresses of rows N?1, N, and N+1 to a table stored in the memory device.Type: GrantFiled: May 15, 2007Date of Patent: June 7, 2011Assignee: SanDisk CorporationInventors: Derek J. Bosch, Christopher S. Moore
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Patent number: 7958400Abstract: A computer-implemented method for evaluating software code includes measuring a first coverage of a test applied to the software code and then making a modification in a first section of the software code. A second coverage of the test applied to the software code is measured after making the modification. A difference is identified between the first coverage and the second coverage in a second section of the software code, which is separate from the first section and was not modified since the first coverage was measured, and an indication of the difference is output.Type: GrantFiled: April 16, 2007Date of Patent: June 7, 2011Assignee: International Business Machines CorporationInventor: Shmuel Ur
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Patent number: 7954010Abstract: Methods and apparatus to detect an error condition in a communication network are disclosed herein. An example method of detecting an error condition in a communication network includes collecting first metric data from a first endpoint device, the first metric data being related to a first connection between the first endpoint device and a communication network; collecting second metric data from a second endpoint device, the second metric data being related to a second connection between the second endpoint device and the communication network; determining if at least one of the first and second metric data are indicative of the error condition; when the at least one of the first and second metric data are indicative of the error condition, identifying a point of correlation between the first and second connections; identifying a network element based on the point of correlation; and performing an evaluation of the network element.Type: GrantFiled: December 12, 2008Date of Patent: May 31, 2011Assignee: AT&T Intellectual Property I, L.P.Inventors: James Gordon Beattie, Jr., Stephen J. Griesmer
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Patent number: 7937616Abstract: A first logical partition in a first processing complex of a server cluster is operated in an active mode and a second logical partition in the processing complex is operated in a standby mode. Upon detection of a failure in a second processing complex of the server cluster. the standby mode logical partition in the first processing complex is activated to an active mode. In one embodiment, partition resources are transferred from an active mode logical partition to the logical partition activated from standby mode. Other embodiments are described and claimed.Type: GrantFiled: June 28, 2005Date of Patent: May 3, 2011Assignee: International Business Machines CorporationInventors: William Joseph Armstrong, Michael Howard Hartung, Yu-Cheng Hsu, Glenn Rowan Wightwick