Patents Examined by Lona Pham
  • Patent number: 6121121
    Abstract: An Al.sub.0.15 Ga.sub.0.85 N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al.sub.0.15 Ga.sub.0.85 N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Grant
    Filed: July 27, 1999
    Date of Patent: September 19, 2000
    Assignee: Toyoda Gosei Co., Ltd
    Inventor: Norikatsu Koide