Patents Examined by Lorena D Bruner
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Patent number: 10622902Abstract: System controller and method for regulating a power converter. For example, the system controller includes a first controller terminal and a second controller terminal. The system controller is configured to receive an input signal at the first controller terminal and generate a drive signal at the second controller terminal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power converter. Additionally, the system controller is further configured to determine whether the input signal remains larger than a first threshold for a first time period that is equal to or longer than a first predetermined duration.Type: GrantFiled: July 31, 2017Date of Patent: April 14, 2020Assignee: On-Bright Electronics (Shanghai) Co., Ltd.Inventors: Yaming Cao, Qiang Luo, Yuan Lin, Lieyi Fang
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Patent number: 10511295Abstract: The instant disclosure relates to a circuit for comparing a voltage with a first threshold, in which said first threshold depends on a second threshold of opening at least one first normally closed breaker.Type: GrantFiled: October 3, 2013Date of Patent: December 17, 2019Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Sébastien Boisseau, Ghislain Despesse
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Patent number: 10498236Abstract: Disclosed are multilevel buck converters, and controllers and methods for operating such converters. Embodiments improve the voltage gain (Vo/Vin) of multi-level DC-DC converters, such as three-level converters, that is imposed by a duty cycle limitation in conventional approaches. According to certain embodiments, the duty cycle of switches is controlled to so that the converter output voltage is increased.Type: GrantFiled: April 6, 2017Date of Patent: December 3, 2019Inventors: Tianshu Liu, Yan-Fei Liu
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Patent number: 10498245Abstract: The invention relates to an integrated magnetic component for a switched mode power converter, which includes a transformer with two transformer core elements (E2, E3) and at least one choke core element (E1, E4). Each core element (E1, E2, E3, E4) comprises two outer legs (120a, 120b) and a flange (122) which connects the outer legs (120a, 120b) to form U-like core elements. Each choke core element (E1, E4) abuts a flange (122) of one of the transformer core elements (E2, E3). The integrated magnetic component (103) includes a first choke winding (123) arranged on a leg (121.1) of a choke core element (E1) and a second choke winding (124) arranged on another leg (121.4) of a choke core element (E4), where one of a primary (P1, P2) or a secondary winding (S1, S2) of the transformer is connected between the choke windings (123, 124) and where all windings (P1, P2, S1, S2, 123, 124) are interconnected to reduce core losses by flux compensation in order to increase power density.Type: GrantFiled: August 17, 2016Date of Patent: December 3, 2019Assignee: DELTA ELECTRONICS (THAILAND) PUBLIC CO., LTD.Inventors: Hugues Douglas Njiende T., Sergey Tikhonov
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Patent number: 10476372Abstract: A method comprises detecting an input voltage and an output voltage of a buck-boost converter, wherein the buck-boost converter comprises a first high-side switch and a first low-side switch connected in series across an input capacitor, a second high-side switch and a second low-side switch connected in series across an output capacitor and an inductor coupled between a common node of the first high-side switch and the first low-side switch, and a common node of the second high-side switch and the second low-side switch and configuring the buck-boost converter such that at least one of the first high-side switch and second low-side switch operates at a fixed duty cycle mode.Type: GrantFiled: December 22, 2014Date of Patent: November 12, 2019Assignee: Futurewei Technologies, Inc.Inventors: Heping Dai, Liming Ye, Jinbo Huang, Dianbo Fu
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Patent number: 10439510Abstract: In an example embodiment, an apparatus includes a bridge rectifier circuit having branches between the AC and DC nodes formed by a set of transistors. A load current measurement circuit includes a current-controlled current source coupled to the bridge rectifier circuit. The current control current source is configured to generate a mirrored current that is a scaled version of a current through at least one of the set of transistors. A current integration circuit is configured to integrate the mirrored current by charging a capacitor with the scaled current in a first mode and discharging the capacitor in a second mode. A sample and hold circuit is configured to set an output node to a voltage equal to a voltage stored by the capacitor in response to the current integration circuit entering the second mode and prior to the discharge of the capacitor.Type: GrantFiled: March 14, 2017Date of Patent: October 8, 2019Assignee: NXP B.V.Inventors: Peter Christiaans, Robert Glenn Crosby, II, Fu Chun Zhan
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Patent number: 10411605Abstract: System and method for regulating a power conversion system. A system controller for regulating a power conversion system includes a first controller terminal and a second controller terminal. Additionally, the system controller is configured to receive an input signal at the first controller terminal, and generate a drive signal at the second controller terminal based at least in part on the input signal to turn on or off a transistor in order to affect a current associated with a secondary winding of the power conversion system. Moreover, the system controller is further configured to determine whether the input signal is larger than a first threshold at a first time, in response to the input signal being determined to be larger than the first threshold at the first time, determine whether the input signal is smaller than a second threshold at a second time.Type: GrantFiled: November 16, 2016Date of Patent: September 10, 2019Assignee: On-Bright Electronics (Shanghai) Co., Ltd.Inventors: Yaming Cao, Zhenglan Xia, Yuan Lin, Qiang Luo, Lieyi Fang
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Patent number: 10404185Abstract: A three phase medium voltage power conversion system for closed-loop applications comprising a 3L-NPC converter. The switching system of the 3L-NPC converter is based on SHE-PWM patrons. The regulation system of the 3L-NPC converter comprises a controller and an interface module between the controller and the switching system which is configured for supplying to the switching system voltage reference samples at a rate L times faster than the rate of voltage reference samples managed by the controller.Type: GrantFiled: March 9, 2017Date of Patent: September 3, 2019Assignee: SIEMENS GAMESA RENEWABLE ENERGY INNOVATION & TECHNOLOGY, S. L.Inventors: Mario Rizo Morente, Alvar Gonzalo Mayor Miguel, Andres Agudo Araque
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Patent number: 10396561Abstract: The present invention discloses a coordination control method of a multi-terminal VSC-HVDC transmission system. If a direct current voltage master control station shuts down, a direct current voltage control slave station takes over direct current voltage control, and remaining convertor stations keep original control modes. The takeover steps comprise that under the condition that inter-station communications are effective, the master control station sends a shutdown message to the slave station through the inter-station communications, and when the slave station monitors that the direct current voltage master control station shuts down, the slave station switches a current control mode into a direct current voltage control mode; and under the condition that inter-station communications fail or inter-station communications are absent, the slave station monitors changes of the direct current voltage of a system.Type: GrantFiled: July 1, 2013Date of Patent: August 27, 2019Assignees: NR ELECTRIC CO., LTD, NR ENGINEERING CO., LTDInventors: Yunlong Dong, Jie Tian, Gang Li, Dongming Cao, Haiying Li, Haibin Liu
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Patent number: 10389282Abstract: A DC power supply unit is provided that allows for improving efficiency and reducing harmonic currents. A DC power supply unit includes: a bridge rectification circuit having diodes and MOSFETs; a reactor that is arranged between the AC power supply and the bridge rectifier circuit; a smoothing capacitor that is connected to an output side of the bridge rectifier circuit and smoothes a voltage; and a converter control unit that executes, based on predetermined threshold values, a diode rectification control that uses diodes and parasitic diodes of the MOSFETs, a synchronous rectification control that switches the MOSFETs in synchronization with a polarity of the voltage of the AC power supply, a partial switching control that repeats partially short-circuiting the reactor multiple times in a half cycle of the AC power supply, or a fast switching control that short-circuits the reactor at a predetermined frequency over a full AC cycle.Type: GrantFiled: February 25, 2016Date of Patent: August 20, 2019Assignee: Hitachi-Johnson Controls Air Conditioning, Inc.Inventors: Koji Tsukii, Atsushi Okuyama, Tsutomu Kurokawa, Masahiro Tamura, Kenji Tamura
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Patent number: 10367413Abstract: Disclosed techniques achieve soft-switching conditions by determining relative timing of switch states and events, and making recurring timing adjustments in successive cycles (i.e., cycle-by-cycle) to reduce timing errors that introduce switching losses. Timing adjustments provide a prediction of when an optimal soft-switching condition will exist during a subsequent cycle so that switch-actuation signals are provided, irrespective of inherent signaling and feedback delays, in advance of actually observing the condition, thereby subsequently changing a switching state within a desired threshold of the targeted soft-switching condition. Error in the prediction is observed and compensating corrections applied during the next cycle.Type: GrantFiled: July 22, 2016Date of Patent: July 30, 2019Assignee: Pre-Switch, Inc.Inventors: James Hamond, Jarrod Tuma
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Patent number: 10361633Abstract: An integrated circuit includes an output terminal a first input terminal is configured to receive a signal proportional to a voltage between first and second terminals of the primary winding, and a second input terminal is configured to receive a signal proportional to a current flowing through the primary winding. A quasi-resonant (QR) circuit has a first input coupled to the first terminal, and a second input coupled to an output of an oscillator circuit. A selector circuit has a first input coupled to the output of the oscillator circuit, a second input coupled to an output of the QR circuit, and a select input. An output control circuit includes a first input coupled to the second input terminal, a second input coupled to an output of the selector circuit, and an output coupled to a control terminal of the switching transistor.Type: GrantFiled: July 31, 2017Date of Patent: July 23, 2019Assignee: STMicroelectronics S.r.l.Inventors: Giovanni Lombardo, Claudio Adragna, Salvatore Tumminaro
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Patent number: 10355613Abstract: A switch driving circuit is provided, wherein the switch driving circuit has a function of periodically updating a simultaneous OFF time prepared to soft-switch an upper switch and a lower switch of a switching output circuit, and is configured to monitor how an output power or an input power of the switching output circuit is changed depending on previous updating of the simultaneous OFF time to determine new updated contents.Type: GrantFiled: October 15, 2015Date of Patent: July 16, 2019Assignee: Rohm Co., Ltd.Inventors: Hirokazu Oki, Kiyoaki Hoshino, Seiichiro Kondo, Yuichi Kokusho
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Patent number: 10355669Abstract: A filtering unit is presented. The filtering unit includes at least two operational amplifiers, where each of the at least two operational amplifiers includes an input end and an output end, where the input end of one operational amplifier is coupled across the corresponding input end of another operational amplifier of the at least two operational amplifiers. The filtering unit also includes a direct current link operatively coupled to the at least two operational amplifiers and at least one thermoelectric module, where each thermoelectric module includes a conducting layer, where the direct current link and at least one of the at least two operational amplifiers are operatively coupled to the at least one thermoelectric module. A filtering system is also presented.Type: GrantFiled: August 19, 2016Date of Patent: July 16, 2019Assignee: General Electric CompanyInventors: Ruxi Wang, Satish Prabhakaran, Feng Chen, Di Zhang
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Patent number: 10340811Abstract: A selectable increase in the common source inductance is obtained by a layout for a power module used for a half-bridge phase leg in an inverter for an electrically-driven vehicle. The power module comprises a pair of transistor dies connected to positive, negative, and AC conductive tracks for carrying bridge currents. The module includes a pair of gate drive pins and a pair of gate drive coils connecting a respective pin and die. The gate drive coils are disposed in a region between the positive and negative tracks containing a flux generated by the currents having a locally greatest rate of change. The coils may preferably be comprised of traces on an auxiliary printed circuit board incorporated in the module. The gate drive pins can be on the gate side or the emitter side of the transistor dies.Type: GrantFiled: November 28, 2016Date of Patent: July 2, 2019Assignee: FORD GLOBAL TECHNOLOGIES, LLCInventors: Zhuxian Xu, Chingchi Chen, Michael W. Degner
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Patent number: 10333391Abstract: The present disclosure relates to methods and circuits to achieve a buck-boost switching regulator that allows changing operation modes without causing large output ripples during transition of operation modes Increased error amplifier output voltage range over which the converter stays in its present operating mode (buck or boost or buck-boost), resulting in hysteresis between error amplifier output voltage and output voltage). The larger the hysteresis, the smaller will be the likeliness of having to switch between modes. A first embodiment is combining masking logic applied to signals driving the switches of the switching regulator and offset feedback to outputs of the error amplifier in order to providing hysteresis to suppress operation mode bounce and to minimize ripples while a second embodiment is monitoring pulse width of PWM pulses by a pulse width checker.Type: GrantFiled: March 20, 2013Date of Patent: June 25, 2019Assignee: Dialog Semiconductor GmbHInventor: Naoyuki Unno
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Patent number: 10333384Abstract: In accordance with an embodiment, switch driver includes a first switch driver configured to be coupled to a control node of a first switch, a second driver configured to be coupled to a control node of a second switch, and a first terminal and a second terminal configured to be couple to a boot capacitor. The first terminal is coupled between a boot input of the first switch driver and the second terminal is configured to be coupled to outputs of the first switch and the second switch. The switch driver further includes a voltage measurement circuit coupled to the first terminal and the second terminal, and a control circuit configured to activate the second switch driver when the voltage measurement circuit indicates that a voltage across boot capacitor is below a first threshold.Type: GrantFiled: January 16, 2017Date of Patent: June 25, 2019Assignee: Infineon Technologies AGInventors: Jens Ejury, Giuseppe Bernacchia, Henrik Hassander
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Patent number: 10333411Abstract: There is disclosed a controller configured to control a synchronous rectification MOSFET having a drain, a source and a gate; the controller comprising a regulator configured to regulate a voltage between the drain and the source to a first regulation voltage, and a gate charger operable during a turn-on phase of the synchronous rectification MOSFET operation and configured to regulate a voltage between the drain and the source to a second regulation voltage having a larger absolute value than the absolute value of the first regulation voltage, wherein the gate charger is further configured to, when in operation, disable the regulator. Also disclosed is a switched mode power converter comprising such a synchronous rectification MOSFET, and a method for controlling such a synchronous rectification MOSFET.Type: GrantFiled: December 30, 2015Date of Patent: June 25, 2019Assignee: NXP B.V.Inventors: Jan Dikken, Jeroen Kleinpenning
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Patent number: 10320290Abstract: A voltage regulator includes an input terminal, an output terminal, a control circuitry, a buck mode switching converter, and a low dropout regulator circuit. The buck mode switching converter is arranged to convert a voltage signal received at the input terminal to a first voltage signal at the output terminal responsive to a first predetermined signal output from the control circuitry. The buck mode switching converter includes an electronically controlled switch in communication with an energy storage element. The low dropout regulator circuit is coupled between the input terminal and the output terminal and includes a linear circuit and is arranged to control a voltage drop across the linear circuit so as to provide a second voltage signal at the output terminal responsive to a second predetermined signal output from the control circuitry.Type: GrantFiled: August 7, 2014Date of Patent: June 11, 2019Assignee: Microsemi CorporationInventors: Arkadiy Peker, Bernard Drexler, Tamir Reshef, Reghu Rajan
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Patent number: 10320310Abstract: A power conversion device includes: a power conversion unit composed of a power conversion circuit having switching elements, an output current measurement unit, an output voltage measurement unit, and reactor; a voltage command generating unit for generating a voltage command; a dead time correction unit for calculating a dead time correction amount for correcting voltage error, between the voltage command and output voltage, caused due to dead time; and a PWM signal generating unit for generating switching signals according to the voltage command and the dead time correction amount, wherein the dead time correction unit calculates the dead time correction amount from the voltage command, the measured output voltage, and the measured output current.Type: GrantFiled: June 24, 2014Date of Patent: June 11, 2019Assignee: Mitsubishi Electric CorporationInventors: Takahiro Kato, Kikuo Izumi