Abstract: A data block in a RAID array is reconstructed under the control of metadata recorded on the RAID array. The RAID array has a plurality of members, each member being a data storage device. The metadata includes device metadata for data blocks recorded on each member and RAIDset metadata for RAID protected data blocks recorded across the members of the RAID array. The RAID protected data blocks include user data blocks, RAIDset metadata blocks and parity data blocks. The data blocks are reconstructed by detecting from a device FE bit in the device metadata that a bad data block corresponding to or associated with the device FE bit needs to be reconstructed. The data is read from each data block, other than the bad data block, in the same RAID sliver with bad data block. A RAID sliver of data blocks includes all the data blocks in a RAID protected sliver of data blocks.

Abstract: A program execution system for a program having one or more versions includes a program storing unit for storing a plurality of program versions, an exclusive condition storing unit for storing invocation data for abnormal termination of a process, an executing unit for selecting a version form among one or more versions of the program corresponding to the process to be invoked, a detecting unit for detecting an abnormality of the process during the execution, and an updating unit for transferring the invocation data. If the currently executing code version fails, the program execution system selects another version for execution, thus minimizing system interruption and improving system reliability.

Abstract: An electricity meter having a protected enabling scheme for activating meter options and upgrades is presented. The meter has a unique serial number, which includes bit-flags indicating which options have already been enabled, stored in the non-volatile RAM. Each option which is not enabled must be requested and a password verified before it can be utilized. At least one password is stored in a read protected location in the non-volatile RAM. The meter is in communication with a computer, e.g., a desktop or laptop type of computer. The password is generated by processing a secret software key and the unique serial number of the meter with an authentication algorithm. The computer is loaded with an upgrade software program, which includes the authentication algorithm. A hardware key which stores a secret software key is attached to a parallel port of the computer.

Abstract: The present invention discloses an amendable static RAM, which can be modified from a high-priced corrupt 32K.times.36 one to a correctly functioning 32K.times.32 one. In each memory block, at least a common sense amplifier is employed as an amendable local sense amplifier. Each amendable local sense amplifier is coupled to a corresponding amendable common sense amplifier and by a switching circuit following the amendable common sense amplifier to all I/O buffers in the same memory block. When the static RAM works well and does not require amendment, the switching circuit is set to a normal condition that the amendable common sense amplifier is coupled to a corresponding amendable I/O buffers. When the static RAM is corrupt and requires modification, the switching circuit is set to an amendable condition wherein the amendable common sense amplifier is coupled to a normal I/O buffer corresponding to the corrupt memory column.

Abstract: A method is disclosed for limited write downs of data from higher security classification users to lower security classification users across computer networks, while preserving the security of classified data at the higher security classification user from covert transmission via acknowledgment messages from the higher user to the lower user. The intended acknowledgment message is released to the lower user when it matches the user content of a predicted acknowledgment message. In TCP/IP interface applications, the acknowledgment messages are IP based data transfer protocols acknowledging the transfer of data from the lower side to the higher side. With IP datagram transfers, deterministic portions are predicted and non-deterministic portions are identified. Where the number of non-deterministic bits exceed a predetermined rate, the acknowledgment message is discarded.

Abstract: A multi-purpose shadow register apparatus in a computer system having a central processing unit, a memory, a memory output select circuit, and a memory output bus includes a shadow register in parallel with the memory output select circuit. The shadow register is connected to receive memory output data from the memory output bus and is responsive to an output enable signal to provide shadow register output data on a shadow register output bus. A shadow register functional logic block which provides a plurality of functional blocks utilize the shadow register in a mutually time-exclusive manner.