Patents Examined by M. Edlow
  • Patent number: 4425575
    Abstract: A base comprising a metal mounting stud to which is fixed a locally metallized insulating plate of the beryllium oxide type. In order to very accurately position active or passive component or components on the insulating plate, at least one connecting electrode comprises at least one abutment zone against which is placed at least one component. This makes it possible to obtain a very good reproducibility of the electrical performances of the device. Such a mounting is applied to ultra-high frequency devices, particularly those incorporating a pre-matching circuit.
    Type: Grant
    Filed: October 26, 1981
    Date of Patent: January 10, 1984
    Assignee: Thomson-CSF
    Inventors: Jean Doyen, Philippe Morel, Jean C. Resneau
  • Patent number: 4381517
    Abstract: A MOSFET consisting of a source region, a drain region and a gate layer is formed on a p-type semiconductor substrate. Field insulation layers are formed to surround the MOSFET, and conductive electrodes are formed thereover. A photosensing layer is overlayed on this structure. This photosensing layer is made of an amorphous chalcogen glass semiconductor material, for example Se-As-Te, and is in contact with the source region through an opening. A charge packet generated within the photosensing layer is transferred to the source region by an electric field induced when a voltage is applied to the conductive electrodes.
    Type: Grant
    Filed: December 12, 1980
    Date of Patent: April 26, 1983
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Nozomu Harada