Patents Examined by M. Edlow
  • Patent number: 4381517
    Abstract: A MOSFET consisting of a source region, a drain region and a gate layer is formed on a p-type semiconductor substrate. Field insulation layers are formed to surround the MOSFET, and conductive electrodes are formed thereover. A photosensing layer is overlayed on this structure. This photosensing layer is made of an amorphous chalcogen glass semiconductor material, for example Se-As-Te, and is in contact with the source region through an opening. A charge packet generated within the photosensing layer is transferred to the source region by an electric field induced when a voltage is applied to the conductive electrodes.
    Type: Grant
    Filed: December 12, 1980
    Date of Patent: April 26, 1983
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Nozomu Harada