Abstract: An apparatus for managing operations of a circuit, including apparatus for computing a cumulative thermal load caused by instructions to be executed by the circuit, apparatus for determining whether the cumulative thermal load exceeds a thermal range of the circuit, and apparatus, coupled to the apparatus for determining, for reducing the cumulative thermal load of the circuit prior to execution of the instructions determined to cause the thermal range to be exceeded. In addition, a method for managing operations of a circuit, including the steps of computing a cumulative thermal load caused by instructions to be executed by the circuit, determining whether the cumulative thermal load exceeds a thermal range of the circuit, and reducing, subsequent to the step of determining, the cumulative thermal load of the circuit prior to execution of the instructions determined to cause the thermal range to be exceeded.

Abstract: A histogram generator system uses a sensor to periodically sample a value of a physical variable to produce at least one sample of the physical variable and a selector allocate each sample of the value of the physical variable into a corresponding counter of a counter array. The counter accumulates a number of occurrences of the value of the sample(s) of the physical variables.

Abstract: Method and apparatus for producing mask-configured integrated circuits which are pin, logic, and timing compatible substitutes for user-configured logic arrays, without the need for logic or timing simulations of the mask-configured circuit design. Scan testing networks of test blocks and modified flip flops are included in the mask-configured substitutes to test functionality. Logic compatibility to the user-configured logic array (an FPGA) is preserved by clustering together in the mask-configured integrated circuit (a gate array) all of the logic gates which perform the functions of a particular FPGA logic block. Moreover, only those FPGA logic gates or functions which are used are replicated in the gate array, to conserve chip area. Test blocks are inserted in the gate array only where needed, i.e. at the output of any function generator that has connections external to the configurable logic block, and all flip flops are modified to also function as test blocks in a test mode.

Abstract: A technique for configuring improved circuit for generating an output sequence of values such as an output sequence used to test memory components or logic circuits. The inventive method is based on the fact that a factorially produced output sequence of values can be broken or divided into partial sequences and factors which may consist of either a single constant or a single mathematically definable term can be defined there from. The partial sequences may be combined by a multiplexor to form the output sequence. This permits a simple, inexpensive circuit for fast interleaving or pulse sequences to be designed. This can be accomplished by analyzing the desired output sequence of values to be created and arranging this output sequence in partial sequences determined by their periodicity.

Abstract: A processing unit couples to a system bus and includes a microprocessor which tightly couples to a local memory. The processing unit also includes an addressable electrically erasable programmable read only memory (EEPROM) unit which couples to the microprocessor and to the system bus. The EEPROM unit stores in first and second separate regions, on-board diagnostic (OBD) routines and boot routines, respectively. The OBD routines are organized into a plurality of categories or phases. The processing unit includes a register accessible only by the microprocessor which, under the control of the OBD routines, is loaded with a number of predetermined values at the beginning of each individual OBD routine for identifying a particular phase and subphase of testing to be performed. Means coupled to the register is directly connected to display a first phase portion of the contents of the register for indicating during which phase of testing a failure occurred.

Abstract: To compensate for quasi-periodic disturbances in measurement signals, the wanted signal is separated from the disturbing signal by determining from an auxiliary signal a series of trigger instants, and estimating from this measurement signal a disturbing signal template, by furthermore generating from this disturbing signal template a trigger-synchronous reference signal, and by using this trigger-synchronous reference signal for filtering the measurement signal. The process can be carried out both after the recording of a complete measurement data set and at the same time as the recording of such a measurement data set. The process is suitable in particular for compensating for cardio-interference during magneto-encephalography.

Abstract: An apparatus and method for quantitatively ranking the performance of each attribute contributing to a manufacturing process. Various signals representing the measure (i.e., quality or yield) of a manufacturing run and representing the attributes that contributed to each manufacturing run are recorded. An iterative process is commenced whereby numeric weights are assigned to each attribute. In a first iterative step, the weight of each attribute is determined to be the weighted average of the measure of each manufacturing run to which that attribute contributed. In subsequent iteration steps, a refined weight for each attribute is determined by computing the ratio between the normalized measure and the product of all other weights associated with that manufacturing run. The iterations are continued until the weights determined for each attribute converge or become self consistent.

Abstract: An automated, computer-controlled system, and a corresponding method, for testing electro-optic modules, is disclosed.

Abstract: A low-power integrated circuit clock/calendar, wherein separate data busses are used for the time data and the alarm data. Conditional logic is used to only compare seconds bits (unless a match occurs, in which case higher-order bits are then compared). Thus, charging and discharging of the data busses (which carry the time data) occurs only when a data transition is occurring. A special clocked latch circuit is used to hold the potential of each line of the time data bus constant, except when the data on the bus is actually changing. These innovations help to provide extremely long battery lifetime, since charge is not consumed by unnecessarily charging and discharging busses. Preferably this bus architecture is combined with a low-power logic architecture.

Abstract: A method and a device for controlling at least one of a first power network (1) and a second power network (3), which are interconnected by means of at least two conductors (2), wherein the first power network comprises at least one current or voltage generator (5) and at least one of the first and the second power networks comprises at least one controllable network element (4). A section B--B through the conductors is defined such that the power networks are located on different sides of the section and at least one line current (IL(k)) and at least one voltage (V(j), E(n)) are sensed at the section. At least one base mode (BM(p)) is formed in dependence on sensed current(s) and sensed voltage(s) and at least one control signal (C(r)) is generated in dependence on the base mode(s) and is supplied to the network element(s) in order to influence currents and/or voltages, occurring in section B--B or in the second power network and generated by the current or voltage generator(s). (FIG. 12).

Abstract: A temperature control circuit which is capable of operating a microprocessor on a very low voltage source. The temperature control circuit uses a pair of field effect transistors and a zener diode in an oscillator circuit to amplify the source voltage. A microprocessor is supplied by the amplified source voltage, and is connected through a transistor to a temperature sensing portion of the circuit. The microprocessor uses the transistor to turn the power to the temperature sensing circuit portion off between temperature samples. By turning the temperature sensing circuit power off between samples, the average power drain by the control circuit is an amount that can be met by the amplified voltage from the low voltage source.

Abstract: A system for electric power demand monitoring and control includes one or more data distribution networks interconnecting intelligent utility units located at customer homes with a host computer located in the utility company offices. Each intelligent utility unit is associated with a customer home for connecting and disconnecting a power service meter, monitoring customer demand, and controlling power to selected units. A network within the home interconnects each intelligent utility unit with power consuming units for providing data on power usage and power control. A data distribution network interconnects the plurality of intelligent utility units to the host computer as a head end unit, the data distribution network providing downstream communication channels from the host computer to the plurality of intelligent utility units and upstream communication channels from the plurality of intelligent utility units to the host computer.

Abstract: Explicit representation of molecular shape of molecules is combined with neural network learning methods to provide models with high predictive ability that generalize to different chemical classes where structurally diverse molecules exhibiting similar surface characteristics are treated as similar. A new machine-learning methodology that can accept multiple representations of objects and construct models that predict characteristics of those objects. An extension of this methodology can be applied in cases where the representations of the objects are determined by a set of adjustable parameters. An iterative process applies intermediate models to generate new representations of the objects by adjusting said parameters and repeatedly retrains the models to obtain better predictive models. This method can be applied to molecules because each molecule can have many orientations and conformations (representations) that are determined by a set of translation, rotation and torsion angle parameters.

Abstract: An alignment analyzer for facilitating the alignment of a machine set including co-rotatable in-line shafts includes a display device on which separate offset misalignment and angle misalignment components are displayed as a single point in an x-y coordinate system. The coordinates of the point are the individual misalignment components. Also displayed on the display device are curves representing "acceptable" and "excellent" tolerance ranges. The displayed point and the curves together indicate whether the combined offset and angular misalignment is within or without the "acceptable" tolerance range, and whether the combined offset and misalignment is within or without the "excellent" tolerance range.

Abstract: A power-saving control system for an MCU includes a plurality of functional portions, a switch, and a register. The functional portions includes a CPU. The switch ON/OFF-controls supply of electric power from a power supply to the respective functional portions. The register stores data for ON/OFF-controlling the switch. The switch is ON/OFF-controlled in accordance with contents of the register, thereby stopping an operational function of each functional portion in an inactive state.

Abstract: A device for measuring parameters such as the pressure in a tire comprises a pressure sensor subject to drift conditioned by temperature. The sensor comprises a temperature-sensitive arrangement to generate a temperature signal and transmit it with the pressure signal to a processor. The processor is adapted to deduce a correction to the value of the pressure measurement signal from the value of the signal representative of the interference.

Abstract: An integrated circuit includes a plurality of interconnected circuit modules having memory elements and logic elements therein. The modules collectively perform the operations of the integrated circuit. However, rather than testing the entire circuit and limiting the degree of fault coverage, individual modules can be tested on a module by module basis. To facilitate testing at the module level, the circuit includes a plurality of control cells connected to respective ones of the modules. Each of the control cells preferably includes a shift register latch for retaining a data signal corresponding to whether the respective module is to be sequentially tested or temporarily disabled. The control cells further comprise a pass-through transistor network for passing the system clock to one or more of the modules under test and for withholding the clock from the modules not under test.

Abstract: A method and an apparatus for active structural acoustic control (ASAC) of sound radiation from and noise transmission through a structure. The method derives acoustic far-field information, corresponding to a `virtual` planar array of microphones, from a vibrational field induced on the structure. The far-field information is used to compute error signals which are provided to an adaptive controller which controls actuators mounted on or embedded in the structure so as to suppress the flexural modes of structure vibration generating acoustic energy. The method is generally applicable to any structure and set of environment boundary conditions. An implementation of the method includes an array of accelerometers mounted on one face of a planar panel, an array of piezoceramic actuators mounted on an opposite panel face, and a frequency-domain adaptive controller utilizing a set of wavenumber-space algorithms.

Abstract: The plateau region of P-C-T isotherm of a hydrogen absorbing alloy between the .alpha. phase region and .beta. phase region thereof is expressed by a normal cumulative distribution function wherein hydrogen content X is taken as frequency and the logarithm of equilibrium hydrogen pressure as a random variable. Parameters such as standard deviation .sigma. of the function are determined by numerical analysis based on measured data as to the equilibrium hydrogen pressure and hydrogen content of the plateau region of the alloy to be evaluated. Whether the equilibrium characteristics of the alloy are acceptable is determined using the parameters as evaluation criteria.

Abstract: A method and apparatus for directly controlling the net power flow on tie lines between different areas of a large electric power system, which provides automatic dynamic control to maintain the stability of the system. Utilizing a sensitivity matrix and simple measurements of real power output from each of the generators in a given area, it is possible to dynamically control the entire system in a way which accounts for loading changes in any area. The control can be implemented using a Flexible AC Transmission Systems (FACTS) technology controller which utilizes the measurements and sensitivity matrix from a given area to determine a derived net power flow from the first area to the remainder of the system, and for comparing the derived net power flow to a set point to provide an error signal which approaches zero as the controller adjusts, for example, a phase angle difference across the tie line to adjust the net power flow thereon.