Abstract: A method begins with a processing module issuing a set of write requests regarding storing a set of encoded data slices in dispersed storage network (DSN) memory and confirming that at least a write threshold number of encoded data slices have been temporarily stored in the DSN memory. When confirmed, the method continues with the processing module issuing a second set of write requests regarding storing a set of encoded directory slices in the DSN memory and confirming that at least a second write threshold number of encoded directory slices have been temporarily stored in the DSN memory. When confirmed, the method continues with the processing module issuing write commit requests regarding the at least a write threshold number of encoded data slices and the at least a second write threshold number of encoded directory slices.

Abstract: A method begins with a processing module of a dispersed storage network (DSN) maintaining, over time, a continuum of time-to-repair information regarding a plurality of storage units of the DSN and maintaining, over time, a continuum of time-to-failure information regarding the plurality of storage units. When the continuum of time-to-repair information and the continuum of time-to-failure information are each below undesired levels, the method continues with the processing module changing dispersed storage error encoding parameters of a logical storage vault of the DSN by lowering a decode threshold number with respect to a current decode threshold number and increasing a pillar width number with respect to a current pillar width number. The method continues with the processing module re-encoding stored encoded data of the logical storage vault based on the increased pillar width number and the decreased decode threshold number.

Abstract: A method for controlling a memory apparatus and the associated memory apparatus thereof and the associated controller thereof are provided, where the method includes: reading encoded data of a second set of error correction configuring parameters from a system block, and utilizing an LDPC engine to decode the encoded data to obtain the second set of error correction configuring parameters, where the LDPC engine stores a first set of error correction configuring parameters, and during decoding the encoded data, the LDPC engine performs decoding corresponding to a first LDPC characteristic matrix based on the first set of error correction configuring parameters; and controlling the LDPC engine to perform operations corresponding to a second LDPC characteristic matrix based on the second set of error correction configuring parameters in RAM, in order to make the LDPC engine be equipped with new encoding and decoding capabilities corresponding to the second LDPC characteristic matrix.

Abstract: A nonvolatile memory controller includes memory storage configured to store a two-index look-up table that includes a Log-Likelihood Ratio (LLR), hard-and-soft-decision bits associate with the LLR and a neighboring cell read pattern associated with the LLR. Read circuitry is configured to perform a plurality of reads of a cell of a nonvolatile memory storage module at different read voltage levels to generate target cell hard-and-soft-decision bits and configured to read neighboring cells to generate neighboring cell reads. Neighboring cell processing circuitry combines the neighboring cell reads to generate a neighboring cell read pattern. Look-up circuitry accesses the two-index look-up table using the target cell hard-and-soft-decision bits and the neighboring cell read pattern to identify the corresponding LLR for use in Low-Density Parity Check (LDPC) decoding of a codeword stored in the nonvolatile memory storage module.

Abstract: Automatic retransmission in communications systems. In one embodiment, a portion of data is identified to be retransmitted based on feedback information indicating a negative acknowledgement (NACK) during a cyclic redundancy check (CRC) on a previous transmission of the portion of data. A retransmission mode is selected for the portion of data, from at least a first mode that retransmits the portion of data on at least a first transmitter antenna while transmitting new data on at least a second transmitter antenna, based on first desired transmission characteristics; and a second mode that retransmits the portion of data simultaneously on at least the first and second transmitter antennas, based on second desired transmission characteristics.

Abstract: An approach is provided for decoding a low density parity check (LDPC) coded signal. Edge values associated with a structured parity check matrix used to generate the LDPC coded signal are retrieved from memory. The edge values specify the relationship of bit nodes and check nodes, and are stored within memory according to a predetermined scheme that permits concurrent retrieval of a set of the edge values. A decoded signal corresponding to the LDPC coded signal is output based on the retrieved edge values.

Abstract: A packet data transmitting method and mobile communication system using the same enables transmission of common ACK/NACK information from each sector of a base station to a user entity in softer handover. The method includes receiving via at least one of the plurality of sectors a data packet from the mobile terminal, the data packet being correspondingly received for each of the at least one of the plurality of sectors; combining the correspondingly received data packets, to obtain a signal having a highest signal-to-noise ratio; decoding the value obtained by the combining; determining a transmission status of the data packet according to the decoding; and transmitting to the mobile terminal a common ACK/NACK signal including one of a common ACK signal and a common NACK signal according to the determining, the common ACK/NACK signal being transmitted via each of the at least one sector.

Abstract: A system for, and method of, assigning code blocks to constituent decoding units in a turbo decoding system having parallel decoding units. In one embodiment, the system includes: (1) a resource model generator configured to generate a model that represents the constituent decoding units and memories thereof along two dimensions, (2) a decoding unit number calculator associated with the resource model generator and configured to determine, for each of the code blocks, a number of the constituent decoding units to use to decode subblocks of each of the code blocks, (3) a rectangle mapper associated with the decoding unit number calculator and configured to generate a mapping in which the code blocks are mapped to the model and (4) a code block assigner associated with the rectangle mapper and configured to assign the subblocks of each code block to the constituent decoding units in accordance with the mapping.

Abstract: A method for decoding multiword information comprises steps (a) to (e). In step (a), a multiword information cluster, e.g., ECC, including high protective codewords, e.g., BIS, and low protective codewords, e.g., LDC, is provided. In step (b), the high and low protective codewords are stored into a first memory, e.g., DRAM. In step (c), the high protective codewords are decoded to generate high protective word erasure indicators showing whether decoding errors occur. In step (d), the high protective word erasure indicators are stored into a second memory, e.g., SRAM. In step (e), the low protective codewords are decoded. In the meanwhile, an erasure bit for a low protective codeword is marked by finding high protective codewords close to the low protective codeword in the multiword information cluster and looking up the high protective word erasure indicators of the high protective codewords close to the low protective codeword.

Abstract: Formulaic flexible collision-free memory accessing for parallel turbo decoding with quadratic polynomial permutation (QPP) interleave. A means is presented by which any desired number of parallel implemented turbo decoding processors can be employed to perform turbo decoding that has been performed using a QPP interleave. This approach is presented to allow an arbitrarily selected number (M) of decoding processors (e.g., a plurality of parallel implemented turbo decoders) to perform decoding of a turbo coded signal while still using a selected embodiment of a QPP interleave. In addition, a collision-free memory mapping, MOD,C,W) provides more freedom for selecting the particular quadratic polynomial permutation (QPP) interleave (?) that satisfies a parallel turbo decoding implementation with any desired number of parallel implemented turbo decoding processors.

Abstract: A solid state non-volatile memory unit includes, in part, an encoder, a multi-level solid state non-volatile memory array adapted to store data encoded by the encoder, and a decoder adapted to decode the data retrieved from the memory array. The memory array may be a flash EEPROM array. The memory unit optionally includes a modulator and a demodulator. The data modulated by the modulator is stored in the memory array. The demodulator demodulates the modulated data retrieved from the memory array.

Abstract: A method of double detection in a perpendicular magnetic read channel is disclosed. The method generally includes the steps of (A) generating an intermediate signal by performing a first detection on an input signal of the perpendicular read channel, the first detection having a first error rate, (B) generating a statistics signal based on the intermediate signal, the statistics signal conveying noise statistics that depend on data in the input signal and (C) generating an output signal by performing a second detection on the input signal using the noise statistics to reduce a second error rate of the second detection compared with the first error rate, wherein the first detection is independent of the second detection.

Abstract: One embodiment of the present invention sets forth a technique for performing RAID-6 computations using simple arithmetic functions and two-dimensional table lookup operations. Four lookup tables are computed and saved prior to normal operation of a RAID-6 disk array. During normal operation of the RAID-6 disk array, all RAID-6 related computations may be performed using a small set of simple arithmetic operations and a set of lookup operations to three of the four previously saved lookup tables. Greater computational efficiency is gained by reducing the RAID-6 computations to simple operations that are performed efficiently on a typical central processing unit or graphics processing unit.

Abstract: Provided is an apparatus for detection timeout of each channel, which is a socket connection, in a Transmission Control Protocol (TCP) Offload Engine (TOE) using TCP accelerating hardware, and a method thereof. The timer managing apparatus of the TOE using the TCP accelerating hardware, including: a command register for receiving a command for a retransmission timer or a delayed ACK timer from an embedded processor of the TOE; a finite state machine (FSM) for storing information of a timer in operation by analyzing the command for the retransmission timer or the delayed ACK timer stored in the command register and controlling an entire operation of the timer managing apparatus; and a timeout checker for checking timeout of a timer in operation by using the stored timer information and notifying the timeout to the FSM.

Abstract: Methods and apparatus for generating and performing digital communications using a randomized generatable interleaver. In accordance with one exemplary embodiment of the invention, a pseudo random interleaver of size n*m with excellent randomness and spread properties may be generated from a set of seed values. The interleaver of size N=n*m is defined by dividing the N possible address in the interleaver (0?N?1) into n subsets. The subsets are preferably generatable from a single value within the subset either using an algorithm or a memory based lookup table. The set of n seeds comprises one value selected from each subset. An improved communication system incorporating the aforementioned interleaver and using turbo codes or other concatenated coding systems is also disclosed.

Abstract: An encoder system includes a receive module that receives a data stream. A parity generation module generates parity bits based on the data stream and a tensor-product code. A parity insertion module combines the parity bits and the data stream to generate encoded bits.

Abstract: Provided are systems, methods and techniques that use an embedded error-detection code within a received communication signal to determine when to stop iterative decoding of the communication signal.

Abstract: A method for communicating data is provided that includes receiving a plurality of bits associated with a communications flow and recovering data lost from a packet by retransmitting selected subrate data for a lost sample over a specified time period. The method may further include transmitting one additional subrate for each sample. All data is generally retransmitted in a configured time interval and the additional subrate for each sample is transmitted every twenty milliseconds. In still other embodiments, the method includes skipping over any subrates that have already been transmitted within a recovery interval. In one implementation of the present invention, if any subrates had changed and had already been transmitted within the time period, there is no retransmit operation performed. If a lost packet is detected for a sample already in recovery, the time period is reset and a recovery process is initiated again.

Abstract: In a wireless communication network using point-to-point or point-to-multipoint communications, this disclosure teaches the use of combined packets for retransmission and corresponding soft value processing at a receiver, wherein combined packets are formed as the logical combination of two or more previously transmitted packets and allow the receiver to use a single combined packet to correct one or more failed packets. For example, with the combined packet retransmission and corresponding soft value receiver processing as taught herein, a given receiver can use a given combined packet to correct bit errors in all (failed) packets comprising the combined packet as long as the bit errors in a failed packet do not overlap (or align) with bit errors in the other failed packets comprising the combined packet.

Abstract: The present invention is related to an error handling in transmission of information units in radio links and in particular it is related to an error handling using automatic repeat request (ARQ) and transmission of information units in mobile communication. To reduce the access delay of packet data services, the present invention uses different code ratings according to type II hybrid ARQ for different erroneous information units selected from a formatted block of information units before retransmission. Therefore erroneous information units of a block of information units, that have been transmitted, are selected and the set of selected erroneous information units is divided into a set of n subsets encoded with n code ratings. Advantageously, the retransmission of portions of the formatted block with different code ratings enhances the reliability of the retransmission.