Abstract: A reference voltage generating circuit comprises a depletion type MOS transistor of which the gate and the drain are connected to a power source and an enhancement type MOS transistor of which the gate and the drain are connected to the source of the depletion type MOS transistor through a junction from which a reference voltage is outputted. This reference voltage is adapted to be applied to the gate of an enhancement type MOS transistor in a load circuit composed of enhancement/depletion MOS transistors and serving to drive a logical circuit.