Patents Examined by M. Wilezewski
  • Patent number: 7223620
    Abstract: A plurality of light-emitting diode light sources of the same kind are produced simultaneously. Each light source includes a light-emitting diode chip and a luminescence conversion element, which converts the wavelength of at least part of an electromagnetic radiation emitted by the light-emitting diode chip. In a first process, a layer composite with a light-emitting diode layer sequence applied to a carrier substrate is provided. The wafer is provided with trenches and then inserted into a cavity of a mold. A molding compound, which contains a luminescence conversion material, is driven in, so that the trenches are at least partly filled with the molding compound. The mold is then removed and the light-emitting diode light sources are separated from the layer composite. In a second process, instead of the layer composite, a plurality of light-emitting diode chips which are applied to a common carrier in a regular arrangement are provided.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: May 29, 2007
    Assignee: Osram Opto Semiconductor GmbH
    Inventors: Harald Jäger, Herbert Brunner
  • Patent number: 7132323
    Abstract: A method for forming a CMOS well structure including forming a plurality of first conductivity type wells over a substrate, each of the plurality of first conductivity type wells formed in a respective opening in a first mask. A cap is formed over each of the first conductivity type wells, and the first mask is removed. Sidewall spacers are formed on sidewalls of each of the first conductivity type wells. A plurality of second conductivity type wells are formed, each of the plurality of second conductivity type wells are formed between respective first conductivity type wells. A plurality of shallow trench isolations are formed between the first conductivity type wells and second conductive type wells. The plurality of first conductivity type wells are formed by a first selective epitaxial growth process, and the plurality of second conductivity type wells are formed by a second selective epitaxial growth process.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: November 7, 2006
    Assignee: International Business Machines Corporation
    Inventors: Wilfried Haensch, Terence B. Hook, Louis C. Hsu, Rajiv V. Joshi, Werner Rausch
  • Patent number: 4822752
    Abstract: Disclosed herein is a process for producing a single crystal layer of a semiconductor device, which comprises the steps of providing an oxide insulator layer separated by an opening part for seeding, on a major surface of a single crystal semiconductor substrate of the cubic system, providing a polycrystalline or amorphous semiconductor layer on the entire surface of the insulator layer inclusive of the opening part, then providing a protective layer comprising at least a reflective or anti-reflection film comprising strips of a predetermined width, in a predetermined direction relative to the opening part and at a predetermined interval, the protective layer capable of controlling the temperature distributions in the semiconductor layer at the parts corresponding to the stripes or the parts not corresponding to the stripes, thereby completing a base for producing a semiconductor device, thereafter the surface of the base is irradiated with an energy beam through the striped reflective or anti-reflection film
    Type: Grant
    Filed: March 6, 1987
    Date of Patent: April 18, 1989
    Assignee: Agency of Industrial Science and Technology
    Inventors: Kazuyuki Sugahara, Tadashi Nishimura, Shigeru Kusunoki, Yasuo Inoue