Abstract: Disclosed is a method for fabricating conductive contacts in a dielectric layer that overlies a semiconductor wafer having diffusion regions, shallow trench isolation regions, and gate structures that have a part overlying the shallow trench isolation regions. The method includes forming an oxide layer over the gate structures and forming a photoresist mask over the semiconductor wafer, including the oxide layer over the gate structures. The photoresist mask has windows that define an opening over gate contact locations, and the gate contact locations are defined substantially over the part of the gate structures that overlie the shallow trench isolation regions. The method further includes etching the oxide layer over the gate structures through the windows to define exposed gate structure regions.