Abstract: A distributed computing system --,--; having a plurality of computers that differ from each other in terms of performance, load, and type, uniformly manages local priority schemes adapted in the respective computers by utilizing the concept of “urgency” or “time limit”. Each of the computers includes a priority level conversion procedure for performing a conversion between an urgency level and a priority level of processing in accordance with the performance and the load of the computer, and a priority level changing procedure for changing a priority level of a program, which executes the processing, in accordance with a priority level indicated by the priority level conversion procedure.

Abstract: A method and apparatus in a computer for processing messages. A message is received. The message is stored. The message is parsed according to a policy. The message is selectively displayed in a graphical user interface based on the policy, wherein messages failing to meet the policy are undisplayed in the graphical user interface.

Abstract: A system and method for performing computer processing operations in a data processing system includes a multithreaded processor and thread switch logic. The multithreaded processor is capable of switching between two or more threads of instructions which can be independently executed. Each thread has a corresponding state in a thread state register depending on its execution status. The thread switch logic contains a thread switch control register to store the conditions upon which a thread switch can occur. Upon the occurrence of a thread switch event, the state and priority of all threads are dynamically interrogated to determine which thread should be the active thread executing the processor. The thread switch logic has a time-out register which forces a thread switch when execution of the active thread in the multithreaded processor exceeds a programmable period of time.

Abstract: Methods for modeling real-time periodic and aperiodic task scheduling and message passing within multitask systems. The methods utilize undelayed and single sample delayed message connections among software task objects and hardware objects. Task priorities are assigned inversely with period or deadline, so that tasks with shorter periods or deadlines have higher scheduling priorities. Periods of high-criticality tasks are decomposed into smaller pieces that are sequentially dispatched at higher rates where the initial assignment of priority is inconsistent with task criticality. The methods provide for deterministic communication among periodic processes.

Abstract: Method and system for operating a computer system to execute a selected predicted operation which a user has not yet requested is described. The results of the predicted operation are stored with an uncommitted (temporary) status until the user actually requests the results of the predicted operation at which time the the status of the results are changed to a committed (permanent) status so that the results become usable by the user as though generated after the user requests the predicted operation. User activity which invalidates or renders the results of the predicted operation useless is tracked, so that the results will be discarded when appropriate. The selection of the predicted operation is made based on the particular activity being performed by the user at the time. A table of predicted operations may be used which prioritizes the predicted operations.

Abstract: A method for providing mutual exclusion at a single data element level for use in embedded systems. Entries for tasks that are currently holding a resource are stored in a hold list. Entries for tasks that are not currently executing and are waiting to be freed are stored in a wait list. A single mutual exclusion semaphore flags any request to access a resource.

Abstract: A scheduling method for use with a multi-thread system which is capable of time-sharing processing a plurality of threads is provided which can avoid the drawback of priority inversion, minimize the modification of a wait queue, and ensure the optimum use of the processing time of a CPU. According to the present invention, a time slot data is assigned to each thread and the scheduling is carried out on the basis of the time slot data. As a processing time is imparted to the time slot data, the execution of the thread to which the time slot data is assigned is started. In case that a higher priority thread has to wait for the completion of the execution of a lower priority thread, the time slot data assigned to the higher priority thread is handled as a time slot data of the lower priority thread, hence allowing the execution of the lower priority thread to be started upon a processing time imparted to the time slot data.

Abstract: A vector transfer unit for handling transfers of vector data between a memory and a data processor by one or more application programs in a computer system. A compiler identifies the use of vector data in the application program and implements one or more vector instructions for transferring the vector data between memory and registers used to perform calculations on the vector data. The compiler also schedules transfers of portions of the vector data required in a calculation so that calculations on a portion of the vector data are performed while a subsequent portion of the vector data is transferred. A vector buffer pool is partitioned into one or more vector buffers based on configuration information including the number of vectors buffers required by an application program and the size required for each vector buffer. The vector buffers are allocated for exclusive use by an application program that is executing in the data processor.

Abstract: The present invention is a computer implemented method and system for minimizing contention for a shared resource between a plurality of processes executing computer instructions that are associated with said shared resource. The method analyzes at least one of said processes of computer instructions and determines whether at least one of said processes modifies said shared resource. If at least one of said processes does not modify said shared resource, the method controls access to said shared resource by at least one said process.

Abstract: A semaphore manager data structure for managing semaphores in a multi-tasking computer system is disclosed. The data structure comprises of a multiple of indices corresponding to each class, a multiple of semaphore numbers corresponding to each semaphore, and a mapping table defining an assignment of each of the semaphores to each of the classes by utilizing the class indices and the semaphore numbers. The assignment criteria is that a class can only be assigned to one semaphore but a semaphore can be assigned to more than one class.

Abstract: A data processing system that automatically changes a semaphore in response to a test and set or clear and invalidate instruction. When a device desires to either test and set or clear and invalidate a semaphore, it transfers an instruction having a test and set or clear and invalidate operation code and the address of the semaphore over the bus. The device responsible for managing the semaphore receives the instruction and automatically changes the semaphore. Therefore, a device is only required to transfer the instruction to test and set or clear and invalidate the semaphore. Moreover, because the test and set operation requires only a single instruction transfer, special techniques are not necessary to insure exclusive access to the semaphore during the operation.

Abstract: A method and system provides for booting a computer system after configuration data becomes unusable. One method and system provides for booting the computer system from a set of configuration data that last booted the system properly. An embodiment is directed to attempting to boot the computer system from a first set of configuration data, and, if the attempt is unsuccessful, automatically booting the computer system using the second set of configuration data which successfully booted the computer system and was previously stored. In response to a successful boot of the computer system using the first set of configuration data, an embodiment is directed to updating second set of configuration data so that it is equivalent to the first set of configuration data as the second set of configuration data that successfully booted the computer system.

Abstract: A compensating resource manager provides a mechanism for more easily integrating non-transactional durable resources to participate in transactions within a component-based on-line transaction processing system, a well as resources having transaction processing support not conforming to the transaction processing system. The durable resource is integrated using the compensating resource manager by developing two simple components, a worker component that implements a normal action on the resource and a compensator component that implements a compensating action that reverses the normal action on the resource. The worker component uses system-provided services to register its respective compensator component and to log information, such as on a write-ahead basis, to allow the compensator component to reverse its normal action.

Abstract: A system architecture for a high speed serial bus compatible with the 1394 standard is disclosed. A transaction interface coordinates data packets received from or sent to a 1394 bus. A kernel/scheduler/dispatcher is used to allocate memory resources, and start a variety of tasks and services. The tasks and services vary depending on protocols used in a transport layer and application layer used in conjunction with the 1394 layers. Each task operates according to a state machine progression. The transaction interface uses information derived from the data packets received to form message control blocks, particular for each individual task, and places the control blocks into the proper task queue. The transaction interface forms a dispatcher message control block and places it into the scheduler/dispatcher queue to initiate the task. If there are no other message control blocks in the queue particular for the called task, the called task is immediately started.

Abstract: A generic semaphore supporting semaphore operations from multiple operating systems concurrently. Operating system semaphore invocations are transformed into a generic semaphore API that enables implementation of the semaphores. The generic API enables modification to the semaphore value depending upon the current semaphore value, and enables the queuing of threads to enable waiting upon semaphore operations. The semaphore operations implement synchronization of resource access and synchronization of process or thread execution. The generic semaphore enables applications for specific operating system personalities to execute on a microkernel system without modification of the application semaphore logic. This enables application programmers to code applications using known semaphore operations without regard to their final execution location.

Abstract: This invention relates to embedded processing systems used for industrial, commercial, and medical automated systems in which microprocessors or digital signal processors are employed to perform a plurality of distinct tasks based on real-time events and conditions. In particular, this invention provides an efficient processing system and environment in which a variety of application threads may share the processing bandwidth and system resources cooperatively and efficiently, with minimized coupling of the application threads to each other and system resource control details.

Abstract: A method and apparatus for distributing work granules of a parent task among processes running on various nodes in a multi-processing computer system is provided. The parent task is divided into work granules of varying sizes based on the location of the data that must be accessed to perform the work granules. At least one process on each of the nodes that will be assisting in the execution of the parent task is initially assigned a work granule based on efficiency considerations. Such efficiency considerations may include, for example, the location of the data to be accessed relative to the process, the current I/O load of the devices on which data to be accessed is stored, and the relative sizes of the various work granules. When a process completes the work granule assigned to it, the process is assigned one of the remaining unassigned work granules. Again the work granule assignment is made based on efficiency considerations. This process continues until all of the work granules have been completed.

Abstract: A method and apparatus is disclosed for dynamically determining the order of execution of a plurality of computer program components. A characterization mechanism provides an annotation of each executable component. A partial order mechanism depends upon the characterization mechanism, and enables a first executable component to declare which other executable components, times, data sets, or other resources are pre-conditions to execution of the first executable component. At load time, a partial order evaluator resolves the pre-conditions and generates a final order of execution of the components based upon interdependencies and resource requirements represented in the pre-conditions. In a preferred embodiment, the pre-conditions are stored in an acyclic directed graph, and the final order is generated by making a breadth-first traversal of the graph and adding nodes of the graph to the final order in the order in which the nodes are traversed.

Abstract: The processing system includes a storage device for maintaining entity information including period information indicative of information processing periods for the entity. A scheduling application defines application processing information for a desired processing job and identifies the processing job as being recurrent. A function routine determines recurrence information including a set of processing start times corresponding to the information processing periods and the application processing information associated with the processing job. A launch application accesses the recurrence information to identify a current one of the start times, and submits the processing job corresponding to the current start time for processing.

Abstract: A program controlled apparatus includes one or more units for executing a multiple process. A mutex ordering mechanism controls the ordering of mutex ownership to provide deterministic execution of the processes. A mutex processor monitors mutex registers for determining mutex ownership. The mutex registers can be configured as sets of mutex request registers and mutex release registers. The apparatus may include a single processor configured to execute multiple processes concurrently, or multiple processing units, each configured to execute one or more processes. A monitor unit which can monitor equivalent operation of the processing sets can also include the mutex ordering mechanism.