Patents Examined by Majid A. Banankhan
  • Patent number: 5835775
    Abstract: A method and computer system are disclosed for executing family generic, processor specific files. In accordance with one embodiment of the present invention, there is provided a method of executing a file on a computer system. The method includes the computer implemented steps of determining the processor type of a processor; storing a processor type identifier that represents the determined processor type of the processor; executing a first plurality of instructions that includes instructions exclusively from a common set of instructions that are common to a plurality of processor types; executing a second plurality of instructions that is optimized for a first processor type, if the processor type identifier indicates that the processor is of the first processor type; and executing a third plurality of instructions that includes instructions exclusively from the common set of instructions, if the processor type identifier indicates the processor is of a type different than the first processor type.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: November 10, 1998
    Assignee: NCR Corporation
    Inventors: Peter Washington, Richard R. Barton
  • Patent number: 5835764
    Abstract: According to the present invention, a transaction processing system is provided for executing transactional processes representing transactions, wherein the transaction processing functionality is integrated within a reduced kernel operating system such as a microkernel or nanokernel operating system. The system of the invention comprises a processor for executing the processes, and a main memory accessible to the processor for storing programs, including a reduced kernel operating system, to be executed by the processor. The main memory of the system has a supervisor area (510) where operating system functions forming the reduced kernel are stored, and a user area (520) where user programs and other operating system functions are stored.
    Type: Grant
    Filed: May 30, 1996
    Date of Patent: November 10, 1998
    Assignee: International Business Machines Corporation
    Inventors: Michael Platt, Andrew James Stanford-Clark
  • Patent number: 5835768
    Abstract: A system is disclosed for presenting information which reflects the users' cultural preference, including language and other conventions, that can manage locale categories without requiring application programs to manage all the overhead of repetitive changes to locale category values. Users merely specify their cultural preferences through the application programs and the operating system assigns a stack from the working memory for each specified category of cultural preference, and pushes onto the stack the location in the working memory of a file for the category of cultural preference specified, the file having been transferred from a locale database of files that contain code for formatting according to the cultural preferences.
    Type: Grant
    Filed: February 8, 1996
    Date of Patent: November 10, 1998
    Assignee: International Business Machines Corporation
    Inventors: Gary Wayne Miller, Danial A. Rose, Robert Milton Smith, Baldev S. Soor, Luis C. Tan, G. David A. Weston
  • Patent number: 5832262
    Abstract: This invention discloses a hardware manager and scheduler device which can be implemented within a distributed operating system. The scheduler replaces software synchronization and interaction with two unit-level hardware units that facilitate task scheduling. These units utilize global machine memory to manage scheduling queues using a simple algorithm. The "tasks" managed may be programs requiring execution by a processor, other shared system resources that must be cooperatively scheduled, or input/output queues through system peripheral connections. One unit manages tasks waiting to be executed while the other unit manages tasks which have been completed. Each unit reads and writes pointers to task control blocks stored in a shared memory into and from one or more circular memory queues stored separately in the shared memory. Each queue may correspond to a particular task priority and may be separately managed by the device of this invention.
    Type: Grant
    Filed: September 14, 1995
    Date of Patent: November 3, 1998
    Assignee: Lockheed Martin Corporation
    Inventors: Christopher T. Johnson, John D. Bezek
  • Patent number: 5828881
    Abstract: A system and method for stack-based processing of multiple real-time tasks operates on a net list of tasks which operate essentially simultaneously with system resources shared between tasks in a dynamic configuration. This system and method operate to control dispatching of messages which activate signal processing tasks, sequencing of processes activated by the messages and management of signal flow. Tasks are dynamically activated and deactivated in accordance with the specification by the net list by manipulating the task signals on the stack, thereby substantially reducing high-speed memory requirements of the system.
    Type: Grant
    Filed: November 9, 1995
    Date of Patent: October 27, 1998
    Assignee: Chromatic Research, Inc.
    Inventor: Avery L. Wang
  • Patent number: 5828879
    Abstract: A method for scheduling when a server provides service to entities. The method includes the steps of identifying when a first entity requests service from the server. Next there is the step of providing service to an entity, such as a first entity or a second entity, as a function of when the entity requests service from the server. A scheduler for controlling when a server provides service to entities. The scheduler includes a memory having times which are a function of when entities request service from the server. The scheduler also includes a virtual clock that keeps track of time as a function of when entities request service from the server. The scheduler also includes a controller which causes an entity to receive service from the server as a function of when the entity requests service from the server. A scheduler for scheduling when N entities each of which has a weight w, where N is an integer .ltoreq.1 and w is a real number, are served by a server.
    Type: Grant
    Filed: December 22, 1994
    Date of Patent: October 27, 1998
    Assignee: Fore Systems, Inc.
    Inventor: Jon C. R. Bennett
  • Patent number: 5828880
    Abstract: A pipelined process execution control system for multiprocessors is disclosed that enables multiple processors to cooperatively execute one or many software processes so that cache locality is not violated and extensive state, or context, information need not be saved and restored for each small piece of work performed on multiple data items. The present pipelined process execution control system incorporates (1) a software procedure defined as a pipelined sequence of normal or parallel steps, (2) multiple threads running on the multiprocessor, each of which executes the entire sequence of steps on one datum or data item from a received data stream, and (3) a process control structure to control the threads executing the sequence of steps, so that the normal steps are executed by only one thread at a time and the threads begin executing (or "enter") subsequent normal steps in the sequence in the same order as the threads entered the first step of the sequence.
    Type: Grant
    Filed: July 6, 1995
    Date of Patent: October 27, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: James G. Hanko
  • Patent number: 5826081
    Abstract: The present invention provides a process scheduler or dispatcher for a multiprocessor system for real time applications. This embodiment of the present invention proposes a dispatcher model that maintains a dispatch queue for each processor and a separate global dispatch queue for unbound higher priority real time threads. A processor has its own queue and a dispatcher. Each queue has a separate schedule lock associated with it to protect scheduling operations. A processor's dispatcher selects a thread for execution from one of the queues in the system as a candidate thread to execute. When a candidate thread is selected for execution, the processor proceeds to verify against threads in the global real time queue and the processor's own dispatch queue to select a highest priority runnable thread in the system. Thus, the present invention allows the dispatcher to prevent race conditions and minimize lock contention while assuring that high-priority threads are dispatched as quickly as possible.
    Type: Grant
    Filed: May 6, 1996
    Date of Patent: October 20, 1998
    Assignee: Sun Microsystems, Inc.
    Inventor: John E. Zolnowsky
  • Patent number: 5819021
    Abstract: Two methods for partitioning the work to be done by a computer program into smaller pieces so that checkpoints may be done more frequently. Initially, a parallel task starts with one or more input data sets having q initial partitions, divides the input data sets into p partitions by some combination of partitioning elements (i.e., partitioners/gatherers), runs an instance of a component program on each of the p partitions of the data, and produces one or more sets of output files, with each set being considered a partitioned data set. The invention is applied to such a task to create a new, "overpartitioned" task as follows: (1) the partitioner is replaced with an "overpartitioner" which divides its q inputs into n*p partitions, for some integer factor n; (2) the component program is run in a series of n execution phases, with p instances of the component program being run at any time.
    Type: Grant
    Filed: December 11, 1995
    Date of Patent: October 6, 1998
    Assignee: Ab Initio Software Corporation
    Inventors: Craig Stanfill, Cliff Lasser, Robert Lordi
  • Patent number: 5802590
    Abstract: A method and system for allowing processes to access resources. A kernel of an operating system maintains a system-wide resource table. This resource table contains resource entries. When a resource is allocated, the kernel generates a key for the resource. The key is a very large number so as to prevent a malicious process from gaining unauthorized access to the resource. The kernel also hashes the key to generate an index into the resource table that is used as a handle. The kernel stores the key in a resource entry that is indexed by the handle. The handle.backslash.key pair is sent to a process. The process accesses the resources by passing handle.backslash.key pairs to the kernel. The kernel compares the passed key with a key that is stored in the resource entry referenced by the passed handle. When the stored key and the passed key match, the process is allowed to access the resource. When the stored key and the passed key do not match, the kernel rehashes the passed key to generate a new handle.
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: September 1, 1998
    Assignee: Microsoft Corporation
    Inventor: Richard P. Draves
  • Patent number: 5797005
    Abstract: A shared queue is provided to allow any of a plurality of systems to process messages received by clients of a data processing environment. A received message is enqueued onto the shared queue. Any of the plurality of systems having available processing capacity can retrieve the message from the shared queue and process the message. A response to the message, where appropriate, is enqueued onto the shared queue for delivery back to the client. A unique list structure is provided to implement the queue. The list structure is comprised of a plurality of sublists, or queue types. Each queue type is divided into a plurality of list headers. List entries, containing data from the received messages, are chained off of the list headers. A common queue server is used to interface to the queue and to store messages thereon. The common queue server stores message data in storage buffers, and then transfers this data to the list entries. Thus, common queue server coordinates the enqueuing of data onto the shared queue.
    Type: Grant
    Filed: December 30, 1994
    Date of Patent: August 18, 1998
    Assignee: International Business Machines Corporation
    Inventors: James W. Bahls, George S. Denny, Richard G. Hannan, Janna L. Mansker, Bruce E. Naylor, Karen D. Paffendorf, Betty J. Patterson, Sandra L. Stoob, Judy Y. Tse, Anu V. Vakkalagadda
  • Patent number: 5790853
    Abstract: A workspace management section collects resources related to a job and manages them as a workspace separately from resource management of a primary resource management section. The workspace has resource administration information as job relevant information, area information on a display screen, a base image, etc. A program can define the area information together with areas on the screen. A workspace display section superposes icons corresponding to the resources on the base image for display. The icons can be moved by a resource placement section. When an icon is moved to a different area, a job support processing execution section executes a program defined corresponding to the area to which the icon is moved, whereby different meanings can be imparted to the same resource depending on the area in which the corresponding icon is placed.
    Type: Grant
    Filed: December 20, 1995
    Date of Patent: August 4, 1998
    Assignee: Fuji Xerox Co., Ltd.
    Inventors: Takahiko Nomura, Koichi Hayashi, Tan Hazama
  • Patent number: 5781769
    Abstract: A method and associated apparatus for using a content addressable memory (CAM) to process timed events in a process control application. A time value field in each CAM entry identifies the time at which a corresponding event is to be processed. An event identifier field in each CAM entry identifies the event to be processed. A time value generator applies signals indicative of a time value to the CAM. The CAM returns as data on its output signal paths any entries whose time value fields correspond to the applied time value signals. The event identifier field applied to the output signal paths of the CAM is then applied to the process controller to identify an event to be processed. The methods and apparatus of the present invention are applicable, for example, in communication controller devices wherein a protocol requires timed event processing for standardized communications (e.g., Fibre Channel or FDDI).
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: July 14, 1998
    Assignee: Symbios, Inc.
    Inventor: David M. Weber