Patents Examined by Malane Lieng
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Patent number: 12640687Abstract: A power supply modulation device includes a unit detecting, from a first digital signal, a first amplitude being the amplitude of a first analog signal provided to a first amplifier and detecting, from a second digital signal, a second amplitude being the amplitude of a second analog signal provided to a second amplifier; a unit that calculates a time differential value of a ratio of the first amplitude to a sum of the first amplitude and the second amplitude, and determines, on the basis of the time differential value, whether or not output impedance of a combining circuit that combines together the first analog signal amplified and the second analog signal changes along with a change in power of the combined signal; and a unit that controls a power supply voltage supplied to each of the first amplifier and the second amplifier, on the basis of the determination.Type: GrantFiled: December 20, 2022Date of Patent: May 26, 2026Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Satoru Honda, Yuji Komatsuzaki, Shuichi Sakata, Shintaro Shinjo
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Patent number: 12633879Abstract: A Doherty amplification device includes a distributor to distribute, into first and second signals, an input signal after distortion-compensation, first and second amplifiers, a combiner to combine the amplified first and second signals, and an adjuster between the distributor and the first or second amplifiers and to include a first calculation circuit to obtain a first-characteristic indicating a relationship of a gain of an output signal with respect to reference-power of the input signal, based on the output signal and the input signal, a classification circuit to classify the first-characteristic into regions according to the reference-power, a second calculation circuit to obtain a statistical-value of the gain for each regions, and a determination circuit to set, in the adjuster, a phase-delay at which distortion to be generated in the output signal is minimized, based on the statistical-value, wherein the adjuster adjusts the phase-delay of the first or second signals.Type: GrantFiled: July 12, 2023Date of Patent: May 19, 2026Assignee: 1FINITY Inc.Inventors: Toshiyuki Aoki, Akihiko Komatsuzaki, Mitsuharu Hamano
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Patent number: 12633881Abstract: A radio-frequency circuit can include a power amplifier, a first bias circuit and a second bias circuit. The power amplifier can include an input terminal used to receive a radio-frequency signal, and an output terminal used to output an amplified radio-frequency signal. The first bias circuit can include a first output terminal coupled to the input terminal of the power amplifier through a common node. The second bias circuit can include a second output terminal and a current adjustment circuit, where the second output terminal can be coupled to the common node, and the current adjustment circuit can include a transistor. The transistor can include a first terminal coupled to the second output terminal, a second terminal used to receive a reference voltage, and a control terminal.Type: GrantFiled: May 29, 2023Date of Patent: May 19, 2026Assignee: RichWave Technology Corp.Inventors: Chang-Heng Chen, Tien-Yun Peng, Chih-Sheng Chen
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Patent number: 12633882Abstract: In described examples, a circuit includes a reference voltage, a driving circuit with a driving input and a driving output, an output transistor, and a clamp circuit with a clamp input and a clamp output. The output transistor includes a source, a drain, and a gate; the source is coupled to receive the reference voltage. The clamp input is coupled to the driving output and to the gate. The clamp output is coupled to either the driving input or to the driving output, the gate, and the clamp input. The clamp circuit is configured to detect an operating region of the output transistor and to generate a clamping current after the output transistor enters a triode region. The clamping current is selected to prevent an absolute value of a source-gate voltage of the output transistor from equaling or exceeding a gate oxide tunneling voltage of the output transistor.Type: GrantFiled: May 31, 2022Date of Patent: May 19, 2026Assignee: Texas Instruments IncorporatedInventor: Jordan Herschell Wenske
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Patent number: 12627269Abstract: An envelope tracking (ET) integrated circuit (ETIC) operable across wide modulation bandwidth is disclosed. The ETIC includes at least two auxiliary voltage outputs coupled to a high-bandwidth power amplifier circuit that has a lower equivalent capacitance, and thus a higher impedance resonance frequency. The ETIC also includes a pair of ET voltage circuits configured to generate a pair of ET voltages, respectively. To help mitigate potential distortion in the ET voltages, a control circuit is configured to couple the ET voltage circuits exclusively to the auxiliary voltage outputs when the ETIC needs to operate with a high modulation bandwidth (e.g., ?200 MHz). Given the higher impedance resonance frequency of the high-bandwidth power amplifier circuit, it is possible to increase separation between an energy spectrum of a voltage disturbance and an energy spectrum of the high modulation bandwidth, thus helping to reduce the potential distortion in the ET voltages.Type: GrantFiled: September 17, 2021Date of Patent: May 12, 2026Assignee: Qorvo US, Inc.Inventor: Nadim Khlat
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Patent number: 12615018Abstract: An amplifier module includes a Doherty amplifier circuit, and the Doherty amplifier circuit includes a first transistor chip constituting a carrier amplifier, a first output signal line configured to transmit a first amplified signal outputted from the carrier amplifier, a second transistor chip constituting a peak amplifier, and a second output signal line configured to transmit a synthetic signal of the first amplified signal and a second amplified signal outputted from the peak amplifier. A direction from a drain terminal of the second transistor chip to a connection, of the first conductor of the first output signal line, with the first bonding wire is the same direction as a direction from the drain terminal of the second transistor chip to a connection, of the second conductor of the second output signal line, with the second bonding wire.Type: GrantFiled: May 24, 2021Date of Patent: April 28, 2026Assignee: Sumitomo Electric Industries, Ltd.Inventor: Yusuke Yahata
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Patent number: 12615022Abstract: A radio frequency circuit assembly architecture is disclosed. An example radio frequency circuit assembly architecture comprises a signal contact and an antenna contact, a power amplifier module connected in a signal path between the signal contact and the antenna contact, the signal path between the power amplifier module and the antenna contact including a differentially signaled portion having a first path and a second path, and a pair of band pass filters, a first band pass filter of the pair of band pass filters being connected in the first path of the differentially signaled portion and a second band pass filter of the pair of band pass filters being connected in the second path of the differentially signaled portion.Type: GrantFiled: September 29, 2022Date of Patent: April 28, 2026Assignee: Skyworks Solutions, Inc.Inventor: David Richard Pehlke
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Patent number: 12609658Abstract: A pre-compensation method for a pre-compensation circuit coupled to a power amplifier to compensate for nonlinearity of the power amplifier includes performing pre-distortion according to at least one parameter or at least one hyperparameter to convert a first input signal received by the pre-compensation circuit into a first pre-distortion output signal, updating the at least one parameter or the at least one hyperparameter according to Bayesian Optimization, Causal Bayesian Optimization, or Dynamic Causal Bayesian Optimization, and performing pre-distortion according to the at least one parameter updated or the at least one hyperparameter updated to convert a second input signal received by the pre-compensation circuit into a second pre-distortion output signal.Type: GrantFiled: March 1, 2023Date of Patent: April 21, 2026Assignee: Wistron CorporationInventor: Chih-Ming Chen
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Patent number: 12603620Abstract: A class-D amplifier that amplifies an input signal comprises a control circuit configured to generate a control signal that varies in accordance with a level of the input signal, a first generating circuit configured to generate a first pulse, and a second generating circuit configured to generate a second pulse. A pulse width of the first pulse becomes narrower as the signal level of the input signal becomes smaller, and the pulse width of the first pulse becomes wider as an instantaneous magnitude of the input signal becomes larger. A pulse width of the second pulse becomes narrower as the signal level of the input signal becomes smaller, and the pulse width of the second pulse becomes wider as an instantaneous magnitude of the input signal becomes smaller.Type: GrantFiled: March 27, 2023Date of Patent: April 14, 2026Assignee: Yamaha CorporationInventors: Shinya Mizoshiri, Masao Noro
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Patent number: 12592670Abstract: In some aspects, the disclosure is directed to methods and systems for an amplifier having common mode feedback inputs. The inputs are coupled to various points within an amplifier wherein a first set of directly coupled common mode feedback inputs join the amplifier one or more nodes, and a second set of capacitively coupled common mode feedback inputs are joined to the amplifier at one or more different nodes.Type: GrantFiled: April 21, 2023Date of Patent: March 31, 2026Assignee: Avago Technologies International Sales Pte. LimitedInventors: Md Shakil Akter, Jan Mulder, Han Yan
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Patent number: 12587143Abstract: A power amplifier comprises a first transistor, a first transformer, a first variable resistor, a first bias circuit and coupling circuitry configured to couple the first transformer, a first end of the first variable resistor, and a collector of the first transistor at a first node, the first transformer and a second end of the first variable resistor at a second node, and the bias circuit and a base of the first transistor at a third node.Type: GrantFiled: September 29, 2022Date of Patent: March 24, 2026Assignee: Skyworks Solutions, Inc.Inventor: Philip John Lehtola
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Patent number: 12587146Abstract: A power amplifier device includes an amplification path implemented within a power amplifier package. The amplification path includes input and output package leads, a transistor die with transistor input and output terminals and a power transistor, and a two-stage input impedance matching circuit electrically coupled between the input package lead and the transistor input terminal. The two-stage input impedance matching circuit has a double T-match topology that includes a first resonator coupled to the first input package lead, and a second resonator coupled between the first resonator and the transistor input terminal. The amplification path also includes an output impedance matching circuit coupled between the transistor output terminal and the first output package lead, and a second output harmonic termination circuit coupled to the first output package lead.Type: GrantFiled: February 24, 2023Date of Patent: March 24, 2026Assignee: NXP USA, INC.Inventors: Laure Bollinger, Yuanyuan Dong, Aniket Anant Wadodkar, Liang Xu
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Patent number: 12587149Abstract: In some embodiments, stability in power amplifiers can be achieved under high in-band voltage standing wave ratio condition, with an amplifier circuit that includes an amplifier having a first stage and a second stage, with each stage including an input and an output, such that the output of the first stage is coupled to the input of the second stage. The amplifier circuit further includes a stabilizing circuit implemented on the input side of the second stage and configured to provide stability in operation of the amplifier under a high in-band voltage standing wave ratio condition.Type: GrantFiled: June 16, 2022Date of Patent: March 24, 2026Assignee: Skyworks Solutions, Inc.Inventors: Kunal Datta, Khaled A. Fayed, Edward James Anthony, Srivatsan Jayaraman
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Patent number: 12567843Abstract: A matching circuit includes: a first wire having one end connected to a first terminal and another end; a second wire having one end connected to the other end of the first wire and another end connected to a first reference potential and electromagnetically coupled to the first wire; and a third wire having one end connected to the one end of the second wire and another end connected to a second terminal and electromagnetically coupled to at least one of the first wire and the second wire.Type: GrantFiled: November 10, 2022Date of Patent: March 3, 2026Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Yuri Honda, Jun Enomoto, Mitsunori Samata
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Patent number: 12562761Abstract: A power amplifier includes an amplifying circuit, a feedback circuit and a grounding capacitor. The amplifier circuit includes at least a first transistor and a second transistor. A control terminal of the first transistor is configured to receive an input signal, a first terminal of the second transistor is coupled to the first transistor, and a second terminal of the second transistor is configured to generate an output signal. The feedback circuit is coupled to the control terminal of the first transistor and the second terminal of the second transistor. The ground capacitor is configured to couple the control terminal of the second transistor to ground. When a frequency of the input signal is between a first band and a second band, an amplification gain of the output signal relative to the input signal is substantially the same.Type: GrantFiled: October 28, 2022Date of Patent: February 24, 2026Assignee: National Yang Ming Chiao Tung UniversityInventors: Heng-Tung Hsu, Yi-Fan Tsao
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Patent number: 12537491Abstract: A differential signal receiver is provided. The differential signal receiver includes a first differential difference amplifier, a second differential difference amplifier, a latch and a first inverter. The first differential difference amplifier and the second differential difference amplifier compare a voltage value of an input signal with a first threshold value and a second threshold value, respectively, so as to output a first difference signal and a second difference signal, respectively. The second threshold value is an opposite value of the first threshold value. The latch has a set terminal for receiving the first difference signal and a reset terminal for receiving the second difference signal. The first inverter is configured to receive the first latch signal and output the first output signal. The first output signal has a duty cycle being the same as a duty cycle of the input signal.Type: GrantFiled: May 30, 2022Date of Patent: January 27, 2026Assignee: REALTEK SEMICONDUCTOR CORP.Inventor: Hou-Ju Pan
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Patent number: 12519439Abstract: A differential amplifier is provided. The differential amplifier includes a first single-ended amplifying means including at least a first terminal and a second terminal, a second single-ended amplifying means including at least a first terminal and a second terminal, a first transmission line, and a second transmission line. In this context, the first terminal of the first single-ended amplifying means is connected to the second terminal of the second single-ended amplifying means via the first transmission line. In addition to this, the first terminal of the second single-ended amplifying means is connected to the second terminal of the first single-ended amplifying means via the second transmission line.Type: GrantFiled: May 27, 2022Date of Patent: January 6, 2026Assignees: IMEC VZW, VRIJE UNIVERSITEIT BRUSSELInventors: Sehoon Park, Daewoong Park, Pierre Wambacq, Jan Craninckx
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Patent number: 12463598Abstract: An outphasing amplifier includes a first amplifier configured to amplify a first signal, a second amplifier configured to amplify a second signal of which a phase difference from the first signal changes, and a synthesizer that has a first transmission line through which a third signal output from the first amplifier passes, a second transmission line through which a fourth signal output from the second amplifier passes, a first coupling circuit that is separately provided from the first transmission line and is coupled to the first transmission line, a second coupling circuit that is separately provided from the second transmission line and coupled to the second transmission line, and a node that synthesizes the third signal having passed through the first transmission line and the fourth signal having passed through the second transmission line.Type: GrantFiled: June 6, 2022Date of Patent: November 4, 2025Assignee: Sumitomo Electric Industries, Ltd.Inventor: Takashi Sumiyoshi