Abstract: A multiple mode display apparatus and methods of use. An apparatus includes a display surface with a first and a second display area. A housing pivotally attached with the display proximate a first edge of the housing is displaceable from a coplanar position with the surface of the display device to a position wherein an angle of at least 90 degrees between the surface of the display and the housing is formed along said first edge. In the first position, the first display area is visible and activated to receive user input or to display output. The second display area is covered by the housing and placed in a mode of reduced power consumption. In the second position, the second display area is visible and activated to display output.

Abstract: An electronic module includes an EL section; a first substrate on which the EL section is formed; a second substrate attached to the first substrate; an integrated circuit chip mounted on the second substrate; a plurality of first power supply interconnects formed on the first substrate, extending through a pair of regions located on both sides of the EL section; and a plurality of second power supply interconnects formed on the second substrate, extending through a pair of regions located on both sides of the integrated circuit chip.

Abstract: Disclosed therein is an apparatus for driving a plasma display panel, with a simple structure.

Abstract: A plasma display panel. A first substrate and a second substrate are provided opposing one another with a predetermined gap therebetween. Address electrodes are formed on the second substrate. Barrier ribs are mounted between the first substrate and the second substrate, the barrier ribs defining a plurality of discharge cells and a plurality of non-discharge regions. Phosphor layers are formed within each of the discharge cells. Discharge sustain electrodes are formed on the first substrate. The non-discharge regions are formed in areas encompassed by discharge cell abscissas and ordinates that pass through centers of each of the discharge cells. Also, external light absorbing members are formed between the second substrate and the barrier ribs layer at areas corresponding to locations of the non-discharge regions.

Abstract: A driver IC for a display that includes a first D/A converter with a 1st selection circuit that receives 1st image signals and supplies a selected positive divisional voltage to a 1st operational amplifier, which supplies a positive pixel voltage by amplifying the selected positive divisional voltage; a 2nd D/A converter with a 2nd selection circuit that receives 2nd image signals and supplies a selected negative divisional voltage to a 2nd operational amplifier, which supplies a negative pixel voltage by amplifying the selected negative divisional voltage; and a polarity switching switch with 1st and 2nd switches connecting the 1st and 2nd D/A converters respectively, the polarity switching switch being switched to supply each of output terminals corresponding to the 1st and 2nd image signals alternately with the positive and negative pixel voltages every horizontal scan period by activating/inactivating the 1st and 2nd switches in a complementary manner.

Abstract: A driver chip includes a base body, input terminals, first output terminals and dummy terminals. The base body includes a face having first to fourth edge portions. The first and second edge portions are disposed in substantially parallel along a longitudinal side of the face, and the third and fourth edge portions are disposed in substantially parallel along a horizontal side of the face. The input terminals are formed on the first edge portion such that the input terminals are arranged along the longitudinal side. The first output terminals are formed on the second edge portion such that the first output terminals are arranged along the longitudinal side. The dummy terminals are formed such that the dummy terminals are disposed between the input terminals and the first output terminals. A warpage and defects of electrical connection between the driver chip and a display panel of the display apparatus are prevented.

Abstract: A display apparatus and a method of driving the same in which a selector outputs one of two high gamma values and one of two low gamma values in one frame unit in response to a selection signal. A gamma reference voltage generator outputs a high gamma reference voltage corresponding to the selected high gamma value and a low gamma reference voltage corresponding to the selected low gamma value. A data driving circuit outputs a first data voltage based on the high gamma reference voltage during a first active period and outputs a second data voltage based on the low gamma reference voltage during a second active period. Thus, a display panel may display an image using data voltages corresponding to different gamma curves in one frame unit, thereby improving visibility of the display apparatus.

Abstract: A comprehensive control system and method of great flexibility. Submodules include the specialized circuitry needed to interface to particular types of field inputs and outputs, but present standardized interfaces to modules or other devices on which they are mounted, reducing overall system cost. Modules can be mounted on backplanes, which suppress outputs to module connectors when modules are absent. An extension to the IEEE 1284 Enhanced Parallel Port standard allows units to be connected in a flexible manner. Submodules include a current-limiting universal digital input submodule able to sense AC signals or DC signals regardless of polarity, and an analog input module offering great flexibility in choice of input signals.

Abstract: A method of illuminating a pixel on a display to a desired brightness level that includes dividing a time required to reach a maximum brightness level into one or more time slices, varying a pixel voltage associated with the pixel according to a sequence of voltage values over the one or more time slices, and gradually increasing the brightness of the pixel according to the pixel voltage.

Abstract: A human-machine interface assembly includes a user interface, a first motor, a second motor, a first sector gear, and a second sector gear. The user interface is configured to rotate about a first rotational axis and a second rotational axis that is perpendicular to the first rotational axis. The user interface is responsive to an input force to rotate about one or both of the first and second rotational axes. The first motor is disposed apart from the first rotational axis and generates a drive force about a third rotational axis that is parallel to the first rotational axis. The second motor is disposed apart from the second rotational axis and generates a drive force about a fourth rotational axis that is parallel to the second rotational axis. The first sector gear is coupled between the first motor and the user interface, and the second sector gear is coupled between the second motor and the user interface.

Abstract: An apparatus and method for driving an LCD device is disclosed, in which resolution of images can be improved by the difference in gray level between adjacent pixels of video data. The apparatus for driving an LCD device includes an LCD panel having a plurality of gate lines and a plurality of data lines, a data converter analyzing the difference in gray level between adjacent pixels of input video data and outputting modulated video data if the difference of gray level between adjacent pixels is larger than a reference value, a timing controller aligning and outputting the modulated video data, a gate driver supplying scan pulses to the gate lines of the LCD panel, and a data driver supplying the modulated video data to the data lines of the LCD panel.

Abstract: An exemplary video graphics array interface tester includes a VGA connector being configured to couple to a VGA interface to be tested and having a plurality of signal pins to output different VGA signals; a load circuit connected to the signal pins of the VGA connector for impedance matching; a selection switch having a plurality of throws corresponding to the signal pins of the VGA connector connected to the signal pins of the VGA connector respectively, and a pole; and a test port connected to the pole of the selection switch for selectively testing one of the VGA signals via selection of the selection switch. Using this tester to detect the VGA interface can guarantee quality and improve efficiency of VGA test.

Abstract: A pixel circuit of an organic light emitting display includes a first transistor that transmits a data signal from a data line in response to a scan signal from a scan line; a first capacitor that stores the data signal received from the first transistor; a second transistor for threshold voltage compensation; a third transistor that transmits the threshold voltage of the second transistor; a fourth transistor that connects the gate and drain of the second transistor in a diode-connected configuration in response to a control signal from a control line; a second capacitor that stores the threshold voltage received through the third transistor; a fifth transistor that generates a driving current corresponding to a combined voltage of the first and the second capacitors due to the turned on third transistor; and an organic light emitting diode that emits light according to the driving current.

Abstract: The invention relates to methods and apparatus for forming images on a display utilizing a control matrix to control the movement of MEMs-based light modulators.

Abstract: An organic light emitting display device includes data lines, selection scan lines, and emission scan lines for transmitting data signals, selection signals, and emission signals, respectively. Pixel circuits are arranged at regions defined by the data lines and the selection scan lines. A first scan driving unit outputs the emission signals. The first scan driving unit includes conversion circuits, each of the conversion circuits including conversion circuit transistors of an identical channel type. Each of the conversion circuits receives a first signal, a second signal, a third signal and a conversion circuit clock signal, and outputs a conversion output signal as a respective emission signal of the emission signals.

Abstract: A dimming method for LED driving circuit is proposed. By temporary switching a pin that is originally used for the input/output of other electric signals to a high impedance node, the dimming control signal may be inputted to dim LEDs. The dimming method comprises the steps of: floating the pin every a period of time to pull the pin's voltage being equal to the dimming control signal; detecting the pin's voltage; and retrieving the dimming control signal in accordance with the detected pin's voltage and thereafter dimming the LEDs.

Abstract: A pixel circuit includes a first transistor transmitting a reference signal or a data signal in response to a selection signal applied through a scan line, second and third transistors inputting a reference current in response to a control signal applied through a control line, a first capacitor storing a voltage compensated by the input reference current to compensate for the data signal received from the first transistor, a second capacitor storing the compensated data signal by the first capacitor, a fourth transistor receiving the compensated data signal to generate a driving current, a fifth transistor transmitting the driving current in response to the control signal applied through the control line, and an organic light emitting diode receiving the driving current from the fifth transistor to emit light.

Abstract: A display device includes a first display panel, a first gate driver, a second display panel and a second gate driver. The first display panel includes a first display region, in which first gate lines are formed, and a first peripheral region surrounding the first display region. The first gate driver is formed at the first peripheral region and outputs a first gate signal to the first gate lines in response to a first clock signal and a second clock signal. The second display panel is electrically connected with the first display panel. The second display panel includes a second display region, in which second gate lines are formed, and a second peripheral region surrounding the second display region. The second gate driver is formed at the second peripheral region and outputs a second gate signal to the second gate lines in response to the first clock signal and second clock signal.

Abstract: A plasma display panel which includes a front panel having a front substrates on which display electrodes each having a scan electrode and a sustain electrode disposed to each other with a discharge gap in between are provided in a plurality of columns; and a rear panel having a rear substrate disposed opposed to the front substrate, on which rear substrate barrier ribs for dividing a discharge space formed with respect to front panel are formed, an data electrode is disposed between the barrier ribs crosswise to the display electrodes, and a phosphor layer is disposed between the barrier ribs. Rear panel is split into a plurality of areas along the direction parallel to the data electrode and barrier ribs are formed for each of the split areas, an alignment mark is provided in a place out of the display region at the splitting border of rear panel, and an insulation layer covering data electrode is provided with a cut to have the alignment mark disclosed.

Abstract: There are included a communication unit, a resolution adjustment unit, a storage unit, a video signal output unit, and a resolution information correction unit. The communication unit requests an image display device that displays an image to transmit first resolution information specifying the resolutions at which the image display device can perform output, and receives the first resolution information. The resolution adjustment unit adjusts the resolution when outputting a video signal outputted to the image display device. The image display device and the display output device conform to a standard for transmission and reception of video signals at one predetermined resolution or more which are determined in advance. The storage unit stores the first resolution information.