Patents Examined by Marc M Duncan
  • Patent number: 10078571
    Abstract: A method for dynamically and adaptively monitoring a system based on its running behavior adjusts monitoring levels of the monitored application in real-time. A rules-based mechanism dynamically adjusts monitoring levels in real-time, based on the system's performance observed during a workload run, whether in a production or test environment.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: September 18, 2018
    Assignee: International Business Machines Corporation
    Inventors: Erik R. Altman, Hitham Ahmed Assem Aly Salama, Nicholas M. Mitchell, Patrick Joseph O'Sullivan, Andres Omar Portillo Dominguez, Peter F. Sweeney
  • Patent number: 10073729
    Abstract: Embodiments provide a fault management method, which can implement fault reporting and processing in an NFV environment. The method includes acquiring first fault information, including a faulty entity identifier and a fault type, of a network functions virtualization infrastructure NFVI entity, where the first fault information is used to indicate that a fault occurs in a first NFVI entity having the faulty entity identifier. The method also includes generating first comprehensive fault information according to the first fault information, where the first comprehensive fault information comprises the first fault information and correlated fault information of the first fault information. The method also includes performing fault repair or reporting processing according to the first comprehensive fault information.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: September 11, 2018
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Jianning Liu, Lei Zhu, Fang Yu
  • Patent number: 10024911
    Abstract: A memory unit stores first and second code values calculated by encoding a first sequence, contained in a first word, and a remaining second sequence of a target sequence, and the number of bytes from a word start to a target sequence start. A code value calculating unit calculates a code value for each byte, based on signal sequence. A first sequence detecting unit detects the first sequence, by comparing the first code value with a difference between the code values at the last byte of a word and at the byte corresponding to the number of bytes. An expected value calculating unit calculates an expected code value at the target sequence end, based on the code value at detection of the first sequence and the second code value. A determination unit signals that the target sequence is detected, when the code value equals the expected value.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: July 17, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Yutaka Tamiya
  • Patent number: 7032127
    Abstract: A method and apparatus for detecting flaws requiring sparing of portions of storage media included as part of a hard disk drive are provided. A window of a selected portion of the storage medium is formed, and the density of defects detected within that window is calculated. If the density of defects exceeds a threshold amount, a signal is passed to the controller. The portion of the storage media containing the defects that caused the generation of the flag may then be spared. The present invention allows the potential for detected defects to significantly affect the ability of the storage medium to be assessed. Furthermore, the present invention does not require that the location of each defect be stored in memory. Accordingly, the present invention is economical to implement, and allows defects to be assessed in substantially real time and with improved accuracy.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: April 18, 2006
    Assignee: Maxtor Corporation
    Inventors: Curtis W. Egan, Steve McCarthy
  • Patent number: 7032130
    Abstract: In a system for performing maintenance/management on a subject machine with a maintenance/management control equipment via a network, a connecting section of the machine for the network is implemented in a duplex configuration including a main maintenance/management processing unit and an auxiliary maintenance/management processing unit equipped with respective power supply units independently from each other. When maintenance/management processing is changed over to the auxiliary maintenance/management processing unit from the main unit upon occurrence of fault in the latter, the auxiliary maintenance/management processing unit takes over the network address of the main maintenance/management processing unit for continuing the maintenance/management processing without coming under notice of the maintenance/management control equipment.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: April 18, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Masanobu Yamamoto, Tomomi Ogawa
  • Patent number: 7007189
    Abstract: Embodiments of a routing system are disclosed, including a method for routing communications in a storage system. The storage system may include multiple nodes interconnected by an interconnection fabric that provides multiple independent paths between a source node and a destination node. Some nodes may be connected to one or more disk drives. The method may include receiving a communication to be sent from a source node to a destination node, selecting a communication path from the multiple independent paths, and sending the communication on the selected communication path. This process may be repeated so that multiple communications may be sent. Each communication path may be selected according to a preference assigned to it, so that a more preferred path is selected more often than a less preferred path.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: February 28, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Whay S. Lee, Randall D. Rettberg
  • Patent number: 6981173
    Abstract: A computer system includes a plurality of memory modules that contain semiconductor memory, such as DIMMs. The system includes a host/data controller that utilizes an XOR engine to store data and parity information in a striped fashion across on a plurality of memory cartridges each containing a plurality of memory modules to create a redundant array of industry standard DIMMs (RAID). Each memory cartridge includes an independent memory controller and a corresponding control mechanism in the host/data controller to interpret the independent transitioning of each memory cartridge between various states, including a redundant-ready and a powerdown state to facilitate “hot-plug” capabilities utilizing the removable memory cartridges. Fault information may be passed between the individual memory controllers and the host/data controller to facilitate expedient fault isolation.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: December 27, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Patrick L. Ferguson, Robert A. Scheffler
  • Patent number: 6959404
    Abstract: A data processor timer comprising a writeable control register, a look-up table and a loadable counter. The loadable counter operates in a first mode to load the count data field and operates in a second mode an entry from said look-up table specified by the count data field. The loadable counter generating a time out signal upon counting a number of clock pulses equal to said count. The writeable control register preferably includes a mode bit selecting the first or second modes. This invention is suitable for a pre-scalar counter as part of a data processor watchdog timer.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: October 25, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Katsunobu Hirakawa, Weifeng Joe Zhou, Jay B. Reimer
  • Patent number: 6954880
    Abstract: Test tool logic and testing methods are provided for facilitating testing a duplexed computer function, such as a duplexed coupling facility. The test tool allows a testcase written for a first environment to be automatically driven in a second environment, thereby facilitating testing of a function of the second environment. Other aspects include logic for intercepting a system event by a test tool to facilitate testing of system-managed event processing, and for adjusting a display characteristic of one or more messages to be displayed by the test tool based on message type. Further, logic for propagating an environmental error indication and for facilitating processing a wait state are also provided, as are several new test tool verbs and macros.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: October 11, 2005
    Assignee: International Business Machines Corporation
    Inventor: Thomas C. Shaw
  • Patent number: 6950967
    Abstract: A disk drive provides manufacture test processing of itself after it is installed and operating within a computer system. The tests include flaw mapping, embedded runout compensation and final drive verification and do not interfere with normal operations of the disk drive.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: September 27, 2005
    Assignee: Maxtor Corporation
    Inventors: Don Brunnett, John L. Seabury
  • Patent number: 6948089
    Abstract: A method for remote backup includes: mirroring data from a primary storage device at a first location to a secondary storage device at a second location; taking a snapshot of the primary storage device and of the secondary storage device; storing the primary storage device snapshot on a first snapshot volume at the first location; storing the secondary storage device snapshot on a second snapshot volume at the second location; updating a data structure to record backup times for the first and second snapshots and to record locations of the snapshots on the snapshot volumes; and repeating the above so as to store multiple generations of snapshots. A method for fast restore uses a selected snapshot located at the first location to restore data. If the selected snapshot at the first location is not available, the selected snapshot at the second location is used.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: September 20, 2005
    Assignee: Hitachi, Ltd.
    Inventor: Akira Fujibayashi
  • Patent number: 6944785
    Abstract: Systems and methods, including computer program products, providing high-availability in server systems. In one implementation, a server system is cluster of two or more autonomous server nodes, each running one or more virtual servers. When a node fails, its virtual servers are migrated to one or more other nodes. Connectivity between nodes and clients is based on virtual IP addresses, where each virtual server has one or more virtual IP addresses. Virtual servers can be assigned failover priorities, and, in failover, higher priority virtual servers can be migrated before lower priority ones. Load balancing can be provided by distributing virtual servers from a failed node to multiple different nodes. When a port within a node fails, the node can reassign virtual IP addresses from the failed port to other ports on the node until no good ports remain and only then migrate virtual servers to another node or nodes.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: September 13, 2005
    Assignee: Network Appliance, Inc.
    Inventors: Omar M. A. Gadir, Kartik Subbanna, Ananda R. Vayyala, Hariprasad Shanmugam, Amod P. Bodas, Tarun Kumar Tripathy, Ravi S. Indurkar, Kurma H. Rao
  • Patent number: 6944796
    Abstract: Embodiments of the present invention provide a system event log for a computer system. The system event log may comprise a RAM coupled to a system bus. The system event log may be configured to record information in the RAM corresponding to bus transactions on the system bus. The information may be used to de-bug system problems.
    Type: Grant
    Filed: June 27, 2002
    Date of Patent: September 13, 2005
    Assignee: Intel Corporation
    Inventors: Aniruddha P. Joshi, Peter R. Munguia, Jennifer C. Wang
  • Patent number: 6938185
    Abstract: One disclosed embodiment is a method for adapting a debugger to a selected target. According to this embodiment, the debugger connects to the selected target. Thereafter a debug core in the debugger dynamically loads a module set from a target database that corresponds to the selected target. Next, a debug info/loader, a disassembler, and/or a target support are dynamically loaded based on the module set loaded by debug core. Thereafter, the debug info/loader, disassembler, and/or target support can directly connect to the selected target to retrieve additional target-specific information. By implementing the above method, the debugger can adapt to new or different targets without the need to rebuild different versions of the debugger to suit new or different targets. In other embodiments, a system for implementing the above method, and a computer readable medium containing a computer program for implementing the above method, are disclosed.
    Type: Grant
    Filed: June 25, 2002
    Date of Patent: August 30, 2005
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Don W. Bebout, Varsha T Shamabhat
  • Patent number: 6934891
    Abstract: A storage system includes a storage controller connected to higher-level devices and a plurality of storages connected to the storage controller for storing data from the higher-level devices. The storage controller includes a channel controller for establishing interface for the higher-level devices, the channel controller including trace information representing details of the interface, and storages for storing the trace information from the channel controller in a format which can be accessed by the higher-level devices. In this configuration, when the channel controller receives a trace information fetching indication from one of the higher-level devices, the channel controller transfers trace information to a cache memory and the storages or to the cache memory or the storages.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: August 23, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Kawaguchi, Shizuo Yokohata, Shinichi Nakayama, Youichi Goto
  • Patent number: 6920587
    Abstract: A method, computer program product, and data processing system for handling errors or other events in a logical partition (LPAR) data processing system is disclosed. When an operating system is initialized in a logical partition, it registers its capabilities for handling particular errors or other events with management software. When an error or other event affecting that logical partition occurs, the management software checks to see if the particular error or event is one that the operating system is capable of handling. If so, the operating system is notified. Otherwise, the management software directs the operating system to take other appropriate action, such as termination of the operating system and/or partition.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: July 19, 2005
    Assignee: International Business Machines Corporation
    Inventors: George John Dawkins, Prakash Vinodrai Desai, Gordon D. McIntosh, Kanisha Patel
  • Patent number: 6918056
    Abstract: Disclosed is internet-based service system and method for remotely restoring damaged data and files through the internet in case that the data and files stored in the hard discs and floppy discs of client personal computers (PC) are partly or entirely damaged. If a user connects to a restoration server through the internet network, a restoration plug-in module of client PCs and a restoration plug-in module of the restoration server will be compared after judging whether the user is registered. The damaged data and files will be restored by using the restoration plug-in module stored at client PC, a restoration result will be recorded and transfer to the restoration server for analyzing the result and the analyzed result will be transferred to client PC and simultaneously recorded on database.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: July 12, 2005
    Assignee: High Antivirus Research Inc.
    Inventor: Dong Hyun Paek
  • Patent number: 6904546
    Abstract: A system and method for notifying an operating system of an error signal transmitted by a communications medium is disclosed. The communications medium connects a plurality of electronic devices. The operating system includes device drivers and is capable of configuring communications between one or more applications and the communications medium. A detector is coupled to the communications medium. The detector receives error signals transmitted by the communications medium, one or more error signals associated with one of the electronic devices. A BIOS is coupled to the detector. The BIOS is capable of determining an electronic device associated with a first error signal. The BIOS generates a hot-eject signal identifying that electronic device in response to the first error signal. The operating system blocks communications between the applications and the identified electronic device in response to the BIOS generating the hot-eject signal.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: June 7, 2005
    Assignee: Dell USA, L.P.
    Inventors: Wuxian Wu, Paul Dennis Stultz, Madhusudhan Rangarajan
  • Patent number: 6892328
    Abstract: A distributed tester method and system communicates test recipes for testing electronic devices from a host computer over a network to a test site. The test site translates test recipes into test instructions for execution by a test engine that determines the status of the electronic device. For instance, in a tester for testing memory, a test recipe is defined and stored with a host computer to determine test data for storage on the memory device under test at the test site. The host computer controls execution of the test recipe over the network. The test recipe is defined and stored in an XML formatted data file transmitted over the network to a processor at the test site. The test site processor translates the XML formatted data into test instructions for execution by a test engine. The test engine determines whether the memory device under test accurately stores data and provides the results, such as erroneously stored data, to the host computer through the network.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: May 10, 2005
    Assignee: Tanisys Technology, Inc.
    Inventors: Joseph C. Klein, Jack C. Little, Paul R. Hunter, Archer R. Lawrence
  • Patent number: 6883118
    Abstract: A software tool and method are provided which allow an unsophisticated user to easily determine or identify problems in a networked computer system. The software tool comprises a diagnostic component adapted to determine at least one attribute associated with the computer system, and a user interface component adapted to launch the diagnostic component and to render the attribute to a user. The diagnostic component may obtain first information related to a local host computer, and selectively perform one or more tests associated with the local host computer according to the first information. The diagnostic component then determines the attribute according to the first information and/or the test results. A self-healing networked computer system is also disclosed, comprising the diagnostic component and a remedial object adapted to perform one or more remedial actions according to the attribute.
    Type: Grant
    Filed: January 24, 2001
    Date of Patent: April 19, 2005
    Assignee: Microsoft Corporation
    Inventors: Dennis A. Morgan, David V. Gunter, Benjamin E. Nick, Sherwood H. Lawrence