Abstract: A central processing unit and a digital data processing system for performing arithmetic processing of numbers that are not presented using traditional 10 radix signed digits 0, 1, 2 . . . 9. The central processing unit and digital data processing system of this invention are configured to process numbers that are from a set of digits {X.sub.1, X.sub.2 . . . X.sub.2n+1 } wherein each of these digits represents a number between -n, . . . -1, 0, 1, . . . n such that n is an integer and n.gtoreq.1. Thus, for any number that comprises more than one digit the most significant digit represents both magnitude and positive/negative state of the number and the remaining least significant digits each have a radix of (2n+1).
Abstract: A branch value output circuit checks a preceding state to which a maximum path metric state determined in a Viterbi decoding process by a Viterbi decoder has transited, uses the maximum path metric state, and determines a branch value between transitions. A correlator determines a correlation in each interval between the branch value and soft-decided received data and outputs a correlative value representing the correlation in each interval. A synchronism/asynchronism determining circuit determines whether the received data are in a synchronous or asynchronous condition based on the correlative value in each interval. If the received data are determined to be in an asynchronous condition by the synchronism/asynchronism determining circuit, the synchronism/asynchronism determining circuit supplies a phase control signal to a phase converter. The phase converter changes the phase of the received data in response to the phase control signal.
Abstract: An iterative spline interpolation method for a numerically-controlled machine tool device is disclosed. The non-uniform rational B-spline (NURBS) curve inputted to the numerically-controlled machine tool is interpolated with a constant step size providing the ability to maintain a controlled velocity to within a specified tolerance. In addition, the distance left to travel on the curve is obtained by a unique spline node-based approximation method providing accurate acceleration and deceleration control. The rational spline interpolation method provides significant reduction in the amount of data required to produce smoothly machined pieces while providing accurate machining of conic sections not possible by previous spline interpolation methods.
Type:
Grant
Filed:
August 29, 1996
Date of Patent:
March 10, 1998
Assignee:
University of Utah Research Foundation
Inventors:
Ji Jia, Elaine Cohen, Samuel H. Drake, Russell D. Fish
Abstract: A fault tolerant inertial reference system employs two independent inertial reference units each having its own inertial sensor array with redundant output information. Each inertial reference unit includes an independent source of position and velocity information through employment of a satellite positioning system. In turn, a high-speed error estimator processes inertial sensor output data from a local inertial sensor array with inertial sensor output data from another external inertial sensor array for determining high-level errors, and a low-speed error estimator processes output data from the local inertial sensor array with the velocity and position information separately obtained from the satellite positioning system for determining low-level errors. In turn these high and low-level errors are processed to determine a fault-free inertial sensor configuration for subsequently determining reliable fault tolerant inertial reference data obtainable with a minimum set of inertial sensors.