Abstract: An information handling system includes a data comparison circuit which includes a number of multi-bit comparison circuit modules, wherein each of the multi-bit comparison circuit modules includes a circuit for comparing two or more bits from a first data source with two or more bits from a second data source to produce an output indicating that the data bits from the first data source are equal to the data bits from the second data source; one or more AND gates for ANDing output signals from each of the first set of circuit modules to produce an output signal if all bits in the first data source are equal to all bits in a second data source; one or more second circuit modules for providing an output signal indicating that data bits from the first data source are unequal to corresponding data bits from the second data source; and one or more inequality combination circuits combining inequality signals from each of the second set of circuit modules to produce an output when value of data from the first data so