Abstract: A logic circuit includes first and second NPN bipolar transistors whose collector-emitter paths are serially connected between a power source potential terminal and a ground terminal, the connection node of the first and second bipolar transistors being connected to a signal input terminal; a first CMOS logic circuit having an input terminal connected to a signal input terminal and an output terminal connected to the base of the first NPN bipolar transistor; a second CMOS logic circuit having an input terminal connected to the signal input terminal and an output terminal connected to the signal output terminal; a first switching circuit connected between the signal output terminal and the base of the second bipolar transistor, and to be set OFF when an input signal is set at a level at which the first NPN bipolar transistor is rendered conductive, and to be set ON when the input signal is set at a level at which the first NPN bipolar transistor is rendered nonconductive; and a second switching circuit connect