Patents Examined by Maria Gurrero
  • Low capacitance interconnection
    Patent number: 6146985
    Abstract: A semiconductor device having reduced parasitic capacitance and, consequentially increased integrated circuit speed, is achieved by removing sections of dielectric interlayers which do not support conductive patterns, as by anisotropic etching, to form air gaps which can remain or are filled in with a dielectric material having a low dielectric constant. In another embodiment, a conformal dielectric coating is deposited, having a low dielectric constant.
    Type: Grant
    Filed: May 4, 1998
    Date of Patent: November 14, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Donald L. Wollesen