Patents Examined by Mark A. Robinson
  • Patent number: 8634681
    Abstract: An optical fiber cable for distributed fiber sensing of fluid pressure is disclosed. There are also disclosed a method and an apparatus for distributed fiber sensing of fluid pressure using the optical fiber cable. The optical fiber cable is adapted for distributed pressure sensing, and comprises: one or more optical fibers (120); and a buffer (130) surrounding the one or more optical fibers and adapted to deform asymmetrically under isotropic pressure (P) such that the fiber experiences asymmetric strain changing the birefringence of the one or more optical fibers. The optical fibers incorporated in the cable may be conventional single mode optical fibers. The optical fiber cable may be used to determine a pressure distribution along the length of the cable. The cable, apparatus or method may be used to detect pressures over long distances such as in pipes, pipelines, or wells.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: January 21, 2014
    Assignee: Fotech Solutions Limited
    Inventor: Alan John Rogers
  • Patent number: 8565573
    Abstract: A cable management assembly for cable clusters of network equipment includes a supporting and fixing component, at least one cable management component and cable constraint components. The fixing component is a metal bar, which may be removably hooked to a cable patch panel. The bar includes evenly distributed U-shaped sections, whose number corresponds to the number of cable management components. Each cable management components may be formed with a trough-shaped upper surface to cradle cables. The bottom of the surface may be provided with a U-shaped groove and two locking members. Each U-shaped section of the bar is passed into a corresponding U-shaped groove and two portions of the bar immediately adjacent to the U-shaped section are snapped into the two locking members so as to fix the cable management component to the bar. The cable constraint component may be a strap inserted through and hanging from a strap hole at a side of the corresponding cable management component.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: October 22, 2013
    Assignee: CommScope, Inc. of North Carolina
    Inventor: Johnny Zheng
  • Patent number: 7925135
    Abstract: A closure device for receiving a fiber optic cable includes an enclosure defining a splice chamber configured to accommodate splices to the plurality of optical fibers. The enclosure has a clamp receiving section therein. The closure device further includes a clamping device including a closed end cavity that receives the strength member to limit buckling of a strength member of the cable inserted in the cavity. The clamping device is configured to be removably inserted into the clamp receiving section of the enclosure. The clamp receiving section is configured to fixedly limit movement of the clamping device relative to the enclosure when the clamping device is installed therein to secure the strength member secured in the clamping device to the enclosure.
    Type: Grant
    Filed: September 11, 2009
    Date of Patent: April 12, 2011
    Assignee: Tyco Electronics Corporation
    Inventors: Julian Mullaney, Justin Everette Thompson, William Alan Carrico
  • Patent number: 7916251
    Abstract: A laminated optical film including a first optical anisotropic layer, and a second optical anisotropic layer, wherein Rth1 of the first optical anisotropic layer, and Rth2 of the second optical anisotropic layer satisfy one of Relationships (1) and (2), and ?Rth1?0 nm and ?Rth2?0 nm ??(1) ?Rth1<0 nm and ?Rth2>0 nm ??(2) wherein a retardation value Rth of the laminated optical film as a whole in its thickness direction satisfies 50 nm?Rth?500 nm, where ?Rth1 denotes a value obtained by calculating the expression Rth1 (at a temperature of 50° C.)?Rth1 (at a temperature of 25° C.) concerning the first optical anisotropic layer, and ?Rth2 denotes a value obtained by calculating the expression Rth2 (at a temperature of 50° C.)?Rth2 (at a temperature of 25° C.) concerning the second optical anisotropic layer.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: March 29, 2011
    Assignee: Fujifilm Corporation
    Inventors: Shun Nakamura, Masayoshi Toyoda
  • Patent number: 7912329
    Abstract: A light source supplies optical signal to an optical switch and a detector detects light receiving level. A control unit changes a deflection control amount for changing an angle of a tilt mirror, and outputs the deflection control amount to a driving unit. When an input and an output ports are same, optical offset of the tilt mirror is calculated based on optimal angle at which the light detector detects an optimal point of the light receiving level. Whenever the input and the output port are different, a structure parameter of the tilt mirror is calculated based on the optical offset and the optimal angle. The optical offset and the structure parameter are stored in a memory as a test result.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: March 22, 2011
    Assignee: Fujitsu Limited
    Inventors: Yoshio Sakai, Yuji Tochio, Kazuyuki Mori, Atsuo Ishizuka
  • Patent number: 7729157
    Abstract: A memory cell array has memory cells, each of which has a ferroelectric capacitor and a selection transistor. A plate line is connected to one end of the ferroelectric capacitor and applied a certain plate line voltage. A sense amplifier circuit senses and amplifies voltage of the bit line. An error correction circuit corrects any error in retained data in the memory cells sensed by the sense amplifier. A plate line control circuit controls the timing for switching a potential of the plate line to a ground potential, based on absence or presence of error correction by the error correction circuit.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: June 1, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Katsuhiko Hoya
  • Patent number: 7463231
    Abstract: The grayscale voltage generating circuit comprises an input/driving stage circuit amplifying an input voltage and output stage circuits receiving a output voltage from the input/driving stage circuit, outputting one of the grayscale voltages, and having a capacitor to keep a voltage level of the grayscale voltage. The output stage circuits are sequentially switched to be connected with the input/driving stage circuit, and an output voltage from the input/driving stage circuit is fed to the plurality of output stage circuits in order. Each of the output stage circuits outputs the grayscale voltage based on a voltage held in the capacitor irrespective of connection with the input/driving stage circuit.
    Type: Grant
    Filed: August 24, 2005
    Date of Patent: December 9, 2008
    Assignee: Nec Electronics Corporation
    Inventor: Makoto Miura
  • Patent number: 7430064
    Abstract: A method and system for rotation-dependent halftone rendering. An image input is received from a scanning system or other source, the received image being either a contone image or an error-diffused mage. If a following right-angle image rotation is to be performed, the image is clustered by a clustering method which yields reduced file sizes with respect to the rotated orientation of the image. If no following right-angle image rotation will be performed, the binary image is clustered by an alternate clustering method which yields reduced file sizes with respect to the non-rotated image. The selective clustering includes dividing the image into a tessellation of cells and then concatenating like bits in each cell in a preferred direction for the rotated or non-rotated image. The clustered image is then rotated if necessary, and compressed.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: September 30, 2008
    Assignee: Xerox Corporation
    Inventors: Yingjun Bai, Xing Li
  • Patent number: 7408538
    Abstract: A scrolling device for a computer may include a touch-sensitive surface, which may be elongated and/or have one or more active regions. Scrolling may be performed in manual as well as automated ways that may result in more accurate and efficient scrolling. Scrolling, as displayed on the screen, may further be rounded to the nearest document text line and/or distance unit, even though a more precise scrolling location value may be stored and/or tracked.
    Type: Grant
    Filed: August 17, 2005
    Date of Patent: August 5, 2008
    Assignee: Microsoft Corporation
    Inventors: Kenneth P. Hinckley, Steven N. Bathiche, James H. Cauthorn, Michael J. Sinclair
  • Patent number: 7399685
    Abstract: A laser beam pattern mask includes an opaque substrate and a plurality of transmission portions formed in the substrate to transmit light, wherein each of the transmission portions extend in a first direction while being uniformly spaced apart from one another by a predetermined distance in a second direction perpendicular to the first direction, each of the transmission portions including hexagonal cells arranged in the first direction and in contact with one another.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: July 15, 2008
    Assignee: LG. Philips LCD Co., Ltd.
    Inventor: Yun Ho Jung
  • Patent number: 7390101
    Abstract: An infrared telescope utilizes two mirrors in an off-axis, eccentric-pupil, re-imaging configuration. To improve the image quality of traditional two mirror telescopes, the reflective surfaces of both the primary and secondary mirrors are ellipsoidal. The ellipsoidal surface of the primary mirror has a greater eccentricity than the ellipsoidal surface of the secondary mirror. The infrared light entering through the eccentric pupil strikes the ellipsoidal reflective surface of the primary mirror. The light is reflected from the primary mirror to the ellipsoidal reflective surface of the secondary mirror. An intermediate image of the object being viewed is formed between the primary and secondary mirrors. The light is reflected from the secondary mirror to an image plane. An aperture stop is located between the secondary mirror and the image plane. The image plane is typically located within a cold shield, to reduce the likelihood that stray light will reach the image plane.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: June 24, 2008
    Assignee: The Boeing Company
    Inventor: Mark A. Lundgren
  • Patent number: 7374953
    Abstract: A ferroelectric random access memory (FRAM) includes a semiconductor substrate and an interlayer insulating layer on the substrate. A diffusion preventive layer is on the interlayer insulating layer. The diffusion preventive layer and the interlayer insulating layer have two node contact holes formed therein. Node conductive layer patterns are aligned with the node contact holes, respectively, and are disposed so as to protrude upward from the diffusion preventive layer. Lower electrodes are disposed on the diffusion preventive layer that cover the node conductive layer patterns, respectively. Thicknesses of the lower electrodes are gradually reduced from a line extending from upper surfaces of the node conductive layer patterns toward the diffusion preventive layer.
    Type: Grant
    Filed: August 12, 2005
    Date of Patent: May 20, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Moon-Sook Lee
  • Patent number: 7368768
    Abstract: Semiconductor Integrated Circuit (IC) devices such as diode and MOSFET that protect circuits from Electrostatic Discharge (ESD) are formed. A diode is formed by an N+ (or P+) and P+ (or N+) diffusion layers within an N (or P) well on a P (or N) type semiconductor substrate. The N+ (or P+) diffusion layer of the diode is connected to the power supply. Additionally, an NMOSFET (or PMOSFET) is formed with N+ (or P+) source/drain regions and a gate on the same P (or N) type substrate. The P+ (or N+) diffusion layer of the diode and the N+ (or P+) source/drain regions of the NMOSFET (or PMOSFET) are connected to a fuse through second and first levels of metal wirings.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: May 6, 2008
    Assignee: Elpida Memory, Inc.
    Inventor: Yoko Hayashida
  • Patent number: 7368785
    Abstract: A metal-oxide-semiconductor transistor device for high voltage (HV MOS) and a method of manufacturing the same are disclosed. The HV MOS transistor device comprises a field oxide region with an indented lower surface combined with a plurality of field plates to elongate the path for disturbing the lateral electric field, therefore the transistor device has a relatively small size.
    Type: Grant
    Filed: May 24, 2006
    Date of Patent: May 6, 2008
    Assignee: United Microelectronics Corp.
    Inventors: Li-Che Chen, Chih-Chong Wang
  • Patent number: 7361574
    Abstract: A method is provided for transferring a single-crystal silicon (Si) film to a glass substrate. The method deposits a germanium (Ge)-containing material overlying a Si wafer, forming a sacrificial Ge-containing film. A single-crystal Si film is formed overlying the sacrificial Ge-containing film. The Si film surface is bonded to a transparent substrate, forming a bonded substrate. The bonded substrate is immersed in a Ge etching solution to remove the sacrificial Ge-containing film, which separates the transparent substrate from the Si wafer. The result is a transparent substrate with an overlying single crystal Si film. Optionally, channels can be formed to distribute the Ge etching solution, and promote the removal of the Ge-containing film.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: April 22, 2008
    Assignee: Sharp Laboratories of America, Inc
    Inventors: Jer-Shen Maa, David R. Evans, Jong-Jan Lee, Douglas J. Tweet, Sheng Teng Hsu
  • Patent number: 7358595
    Abstract: Disclosed is a method for fabricating a MOS transistor. The present method includes forming a buffer layer pattern including nitrogen on the semiconductor substrate; forming a gate insulating layer and a gate electrode on the exposed substrate surface; forming a LDD region in the substrate under the buffer pattern; forming a spacer on a top surface of the buffer pattern and sidewalls of the gate electrode; and forming a source/drain region in the substrate under the buffer pattern.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: April 15, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Eun Jong Shin
  • Patent number: 7358138
    Abstract: An embodiment of the present invention relates to a method of manufacturing a flash memory device.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: April 15, 2008
    Assignee: Hynix Semiconductor Inc.
    Inventor: Hee Gee Lee
  • Patent number: 7355257
    Abstract: A semiconductor superjunction device has a superjunction structure formed in a drift region of the device. The superjunction structure has alternately arranged n-type regions and p-type semiconductor regions layered parallel with the drift direction of carriers, permitting current flow when turned ON and depleting when turned OFF. It also includes a first intrinsic semiconductor region between the n-type and p-type regions. The first intrinsic semiconductor region and the n-type and p-type regions sandwiching the first intrinsic semiconductor region forming a unit. A plurality of units are repetitively arranged to form a repetitively arranged structure. The value of mobility of one of electrons in the n-type region or holes in the p-type region is equal to or less than half the value of mobility of corresponding to one of electrons or holes in the first intrinsic semiconductor region.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: April 8, 2008
    Assignee: Fuji Electric Holdings Co., Ltd.
    Inventors: Daisuke Kishimoto, Susumu Iwamoto, Katsunori Ueno
  • Patent number: 7352032
    Abstract: The drains of the PMOS transistor and the NMOS transistor of a driver are separated and connected to two spaced-apart pins. The spaced-apart pins provide ESD protection to the NMOS transistor, which can be turned on during an ESD event by voltages that propagate through the PMOS transistor during the ESD event.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: April 1, 2008
    Assignee: National Semiconductor Corporation
    Inventors: Charles Chu, Marcel ter Beek
  • Patent number: RE40131
    Abstract: A handheld stereographic book-type device which includes a content support portion (8) configured to position and support stereographic content (1A, 1B), and a stereoscopic viewer (5) configured to enable interocular adjustment. The stereoscopic viewer includes adjustable left and right lenses and respective adjustable occluding apertures to enable perception of stereographic content configured with left and right peripheral monocular fields (FIGS. 7-9, 2DL & 2DR). A viewer pivotal chassis (3) is configured to couple the stereoscopic viewer to the content support portion (8). The viewer pivotal chassis includes a plurality of pivotal axes (3) parallel to a line which bisects the left and right lenses of said viewer to enable the user to visually scan and traverse up and down the length of said content while maintaining focus of said content therewith said viewer (5).
    Type: Grant
    Filed: October 3, 1997
    Date of Patent: March 4, 2008
    Inventor: Charles W. Jones