Abstract: A method for extracting business logic from computer code is disclosed. The computer code has a number of statements. According to the method, the statements are examine to identify a number of conditional statements and a number of action statements. The conditional statements and the action statements are then tagged, with the conditional and action statements each having its associated tag. The conditional statements and the action statements are then respectively grouped together. Next, a number of action sets are generated based on the conditional statements. Each action set includes an associated set of action statements. For each action set, the associated set of action statements are identified from the grouped action statements.

Abstract: A computer-implemented Integrated Development Environment (IDE) for use in constructing a multi-tier business application for a multiple tier computer network. The IDE is used to create and maintain the multi-tier business application quickly and easily on the multiple tier computer network.

Abstract: The present invention is directed to a system and method for utilization of applications on a device having an embedded operating system. Typically, the applications comprise third-party applications without source code. The system and method provide for the modification of the behavior and appearance of such applications and include the functionality to capture and respond to various events occurring in the applications.

Abstract: A grid-enabled ANT system that includes ANT XML task files that can run on both grid-enabled machines or stand-alone computers is disclosed. A network file server is used to store files accessed during the build process, and ANT's standard XML tagging and parameters are used, thus enabling the user to use a standardized format for entering XML information. This grid-enabled ANT is transparent to the user since ANT parses the tasks and automatically sends jobs to the grid, when appropriate, instead of the user deciding which tasks to implement as grid tasks.

Abstract: A method for determining vectorization configurations in a computer processor architecture, the method including identifying a vectorizable loop in a computer program, identifying a memory access pattern of data required for implementing the loop in the architecture, computing a set of candidate configurations of resources required for vectorizing the data in the architecture, where the computing step includes configuring a vector pointer register of the architecture in support of either of reorder-on-read use and reorder-on-write use of a vector element file of the architecture, selecting one of the candidates in accordance with predefined selection criteria, and implementing the selected vectorization configuration in the architecture.

Abstract: A method of installing software on a storage device controlling apparatus which includes at least one channel controller having a circuit board on which are formed a file access processing section receiving requests to input and output data in files as units from an information processing apparatus via a first network and an I/O processor outputting I/O requests corresponding to the requests to input and output data to a storage device; at least one disk controller executing input and output of data into and from the storage device in response to the I/O requests sent from the I/O processor; and a second network connecting the channel controller and the disk controller so as to be able to communicate with each other, the method comprises the step of writing software for enabling the file access processing section to function, into the storage device by communicating with the channel controller via the second network.

Abstract: One embodiment disclosed relates to a method of compiling a computer program from a plurality of files of source code. An inline analysis determines which call sites in the plurality of files to make inline. An inline transformation performs the inlining within currently opened files. The transformer dynamically determines the order of inlines independent of the analyzer by taking into account the disk input-output pressure during compilation. The resulting inline order minimizes the input and output of files from and to disk respectively by considering the inline affinity between files and maintains the best run-time performance by preserving the dependences between call sites. During the inline transformation, a determination of which files to open and close is made in dependence on an affinity weighting between the files.

Abstract: Software developers working on multi-language systems can utilize a multi-language debugging environment. The debugging environment can be uniform across languages, and can seamlessly perform debugging between one or more languages in a multi-language environment. Such a system can have a number of attributes intended to help developers facing debugging problems in multi-language environments.

Abstract: A method for determining changed code in a second program binary relative to a first or baseline program binary, where the second program is a different version of the first program, includes translating, responsive to symbol tables and/or control flow representations, machine addresses of both program binaries to symbols. The first and second program binaries are disassembled using the translated symbols. Differences between the two resulting disassemblies are determined, and a list of the differences is created. Differences between the program binaries can be determined by textually comparing the disassemblies, or alternatively, by determining the differences between the control flow representations of the programs. The list of differences can be presented to a user, or alternatively, can be passed to another process for further processing, such as test coverage analysis, code change analysis, or failure analysis, among other analyses.

Abstract: The present invention provides a method and system for performing operations on data using XML streams. An XML schema defines a limited set of operations that may be performed on data. These operations include addition, subtraction, multiplication and division. The operations are placed in an XML stream that conforms to the XML schema. The XML stream may perform one or more of the defined operations on the data. The limited set of operations allows data to be validated and processed without excessive overhead.

Abstract: A Web-based interface for using a mark-up language (JMSML) to access JMS/JMX interfaces. The invention comprises a Web Application (Servlet) interface that enables the JMSML user to enter and execute the JMSML program via a Web browser. The interface provides a simple form, wherein the user can type in the JMSML commands and specify the server's connection information (for example the URL) on which the user wants to execute the JMSML commands. This enables the user to perform remote administration, monitoring and management of a server's JMS subsystem, from anywhere on a wide area network or the Internet.

Abstract: A system and method for Java Message Service Mark-up Language (JMSML). The system includes an extensible engine that performs the task of parsing input data and converting it to Java JMS/JMX API, and then executes the JMSML program.

Abstract: A command-line interface for using a mark-up language (JMSML) to access JMS/JMX interfaces. The invention comprises a system including a Java stand alone client, acting as the command line interface to execute the JMSML program. The user can specify the JMSML program name, location along with the server's connection information (for example the URL) as command line parameters. This interface then validates these parameters and executes the given JMSML program. This interface requires the JMSML engine JAR file in the CLASSPATH of the user's execution environment.

Abstract: A system and method for configuring a reconfigurable I/O (RIO) device to perform a function in response to user requirements. A graphical user interface program receives user input specifying a function. A configuration generation program generates a hardware configuration program based on the user input. The hardware configuration program is usable to configure a device to perform the function, where the device includes a programmable hardware element and one or more fixed hardware resources coupled to the programmable hardware element. The hardware configuration program is deployable onto the programmable hardware element and specifies usage of the fixed hardware resources by the programmable hardware element in performing the function. The GUI program is further executable to display icons on a display corresponding to at least a subset of the fixed hardware resources, and to modify an appearance of respective fixed hardware resource icons as the corresponding fixed hardware resources are allocated.

Abstract: A visual code designer is provided that allows a user to manipulate control objects on a common design surface. Each control object has extensible snaplines that define alignment characteristics for the control. The snaplines are extensible in that a developer can define and/or specify matching and alignment criteria such as type, filter and offset information. Further, the visual code designer assists the user in positioning a control on the common design surface by automatically aligning the control during design-time without the use of gridlines.

Abstract: Techniques for test flow control include providing a test hierarchy, the test hierarchy includes a collection of test methods, each test method calling test assertion methods for checking the correctness of production code, and each test assertion call defines the test execution flow within the test hierarchy in an event of a failure. The flow inside the test hierarchy is controlled according to a parameter of the test assertion method call, in response to the event.

Abstract: A method, for use in a processor, includes mapping a first data access having less than a predetermined memory footprint to a first memory area, and mapping a second data access having greater than the predetermined memory footprint to a second memory area. The method may also include compiling computer code, inserting annotations into an intermediate representation of the computer code generated during compiling, propagating the annotations from the intermediate representation to a low-level representation of the computer code generated during compiling, and inserting instructions into the low-level representation, the instructions controlling mapping of the first data and the second data.

Abstract: A method is provided for safely editing a binary code to be executed on a computer system. The method allows the binary code to be directly edited without compromising its integrity. More specifically, a larger binary code is transformed into a number of smaller binary code segments having sizes within a reference range of a control transfer function such as a branch instruction. A branch slamming operation can then used to displace a binary instruction contained within a smaller binary code segment with a branch instruction referring to a binary patch that is appended to the smaller binary code segment. The binary instruction displaced by the branch instruction is preserved in the binary patch. Upon completion of the binary patch execution, the smaller binary code segment continues executing with a binary instruction immediately following the branch instruction.

Abstract: A method, apparatus, system, and signal-bearing medium that in an embodiment collect profile information about class-type checks, calculate a number of class-type checks that minimizes a cost of inlining, generate inline code for the number of class-type checks for a site in a method, and sort the inline code based on a frequency of the class types. Any remaining class-type checks at the site that are not handled by the inlined class-type checks are handled via an out-of-line function call. In this way, inlined code is used when it provides better performance than an out-of-line function, and the out-of-line function call is used when it provides better performance than the inlined code.

Abstract: A data processing system has a processor core, memory and a virtual machine interpreter. The virtual machine interpreter receives virtual machine instructions selected dependent on program flow during execution of a virtual machine program. The virtual machine interpreter generates native machine instructions that implement the virtual machine instructions for execution by the processor core. The virtual machine interpreter identifies an initial virtual machine instruction from a body of virtual machine instructions, where the body is expected to be executed repeatedly. The virtual machine interpreter records a correspondence between the initial virtual machine instruction in the body and a memory location in the memory and writes native instructions for the body into the memory from said memory location.