Patents Examined by Mary Steelman
  • Patent number: 6854108
    Abstract: A method (and apparatus) of determinstically replaying an observable run-time behavior of distributed multi-threaded programs on multiprocessors in a shared-memory multiprocessor environment, wherein a run-time behavior of the programs includes sequences of events, each sequence being associated with one of a plurality of execution threads, includes identifying an execution order of critical events of the program, wherein the program includes critical events and non-critical events, generating groups of critical events of the program, generating, for each given execution thread, a logical thread schedule that identifies a sequence of the groups associated with the given execution thread, and storing the logical thread schedule for subsequent reuse.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: February 8, 2005
    Assignee: International Business Machines Corporation
    Inventor: Jong-Deok Choi
  • Patent number: 6851111
    Abstract: A computer system includes multiple class loaders for loading program class files into the system. A constraint checking mechanism is provided wherein a first class file loaded by a first class loader makes a symbolic reference to a second class file loaded by a second class loader, the symbolic reference including a descriptor of a third class file. The constraint mechanism requires that the first and second class files agree on the identity of the third class file and stores a list of constraints as a set of asymmetric relationships between class loaders. Each stored constraint, for a class loader which loaded a class file that contains a symbolic reference to another class file, includes a first parameter denoting the class loader which loaded the class file to which the symbolic references is made; and a second parameter denoting a class file which is identified by a descriptor in said symbolic reference.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: February 1, 2005
    Assignee: International Business Machines Corporation
    Inventors: Richard Kenneth McGuire, Edward John Slattery, Matthew Alexander Webster
  • Patent number: 6836882
    Abstract: Pipeline activity information associated with all stages of execution of an instruction in an instruction pipeline of a data processor is presented to an event detector in timewise aligned format. This permits events in the pipeline to be presented to the event detector in a sequence that is consistent with the context in which a programmer of the event detector would normally think of those events, thereby simplifying programmation of the event detector.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: December 28, 2004
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Patent number: 6807664
    Abstract: An interpreter serves for a programming language. It first receives information specifying names and the like of multiple applications written in the programming language. Then, the interpreter generates individual application areas corresponding to the applications for storing data required for execution of the applications. It also generates a task for each of the applications and executes the application in the task. If the interpreter detects a new class in required classes during execution of the individual applications, it loads bytecodes for the new class in a shared area. Also, if the new class has a class variable, the interpreter allocates a class variable area for the class variable which corresponds to the application. Furthermore, to access a class variable during execution of an application, the interpreter accesses a class variable area for the class variable in the individual application area corresponding to the application.
    Type: Grant
    Filed: December 17, 1999
    Date of Patent: October 19, 2004
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hirokazu Ohi
  • Patent number: 6804813
    Abstract: A symbol resolution system program product for use with a symbolic debugger has multiple symbol files. The symbol files include symbol files for multiple versions of an operating system that could potentially be executing on a target machine. The symbol resolution system has code for automatically locating a symbol file according to a module name and version information extracted from the target machine, and code for automatically verifying correspondence of the located symbol file with the corresponding executable module. The symbol resolution system also has code for resolving symbols according to information contained in the located symbol file.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: October 12, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Richard A. Willems, Peter A. Hiross
  • Patent number: 6802056
    Abstract: Each component binary in a heterogeneous program is translated from a platform-specific instruction set into a set of intermediate representation (IR) instructions that are platform-neutral. The IR instructions are grouped into IR code blocks, the IR code blocks into IR procedures, and the IR procedures into IR components to create an intermediate representation hierarchy for the program. An application program interface is provided that permits user access to the IR hierarchy for instrumentation, optimization, navigation, and manipulation of the IR hierarchy. The transformed IR hierarchy is then translated into platform-specific instructions and output as a modified binary. The user can designate a different platform for the output translation of a code block than the platform for which the code block was originally written. Prologue and epilog code is added to contiguous blocks that are translated into different architectures.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: October 5, 2004
    Assignee: Microsoft Corporation
    Inventors: Ronnie I. Chaiken, Hon Keat W. Chan, Andrew J. Edwards, Gregory A. Eigsti, David M. Gillies, Bruce M. Kuramoto, John A. Lefor, Ken B. Pierce, Amitabh Srivastava, Hoi H. Vo, Gideon A. Yuval
  • Patent number: 6775825
    Abstract: A system and method for generating and sharing consistent application definitions amongst multiple performance and resource management tools. A common interface accepts requests from performance or resource management tools and returns requested process-to-application mapping data. A parameters file contains a common syntax for application definitions, and a module uses the parameters file to determine mapping from processes into applications. A performance monitoring tool for senses current system processes' states and provides measurement data to the mapping module.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: August 10, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Doug Grumann, Michael Richard Carl, Thomas Edwin Turicchi, Jr.
  • Patent number: 6763515
    Abstract: System and method for automatically generating a graphical program to perform an image processing algorithm. A user may develop an image processing algorithm in an image prototyping environment. The image prototyping environment enables the user to easily apply various image processing functions to an image and immediately see the results, in order to develop the desired algorithm. As the user applies each image processing function to an image, the function may be recorded as a step in a script. Once the user has developed an algorithm, the user may request the image prototyping environment to automatically generate a program implementing the image processing algorithm. In various embodiments, the prototyping environment may be operable to generate different types of programs, including text-based and graphical programs.
    Type: Grant
    Filed: June 5, 2000
    Date of Patent: July 13, 2004
    Assignee: National Instruments Corporation
    Inventors: Nicolas Vazquez, Jeffrey L. Kodosky, Ram Kudukoli, Kevin L. Schultz, Dinesh Nair, Christophe Caltagirone
  • Patent number: 6751792
    Abstract: A new method and apparatus for use in post compilation optimizers is presented. The present invention is based on the use of a new graphical representation of code in a linked program called an operands graph. An operands graph combines the best evaluative features of flow graphs in single static-assignment (SSA) form and of value range optimizations. The result is a new ability to evaluate and optimize previously hidden code segments, including code segments only reachable from the various branches of a mutliway branch instructions.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: June 15, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Sreekumar Ramakrishnan Nair
  • Patent number: 6748584
    Abstract: A method for determining changed code in a second program binary relative to a first or baseline program binary, where the second program is a different version of the first program, includes translating, responsive to symbol tables and/or control flow representations, machine addresses of both program binaries to symbols. The first and second program binaries are disassembled using the translated symbols. Differences between the two resulting disassemblies are determined, and a list of the differences is created. Differences between the program binaries can be determined by textually comparing the disassemblies, or alternatively, by determining the differences between the control flow representations of the programs. The list of differences can be presented to a user, or alternatively, can be passed to another process for further processing, such as test coverage analysis, code change analysis, or failure analysis, among other analyses.
    Type: Grant
    Filed: December 29, 1999
    Date of Patent: June 8, 2004
    Assignee: Veritas Operating Corporation
    Inventors: Emmett Witchel, Christopher D. Metcalf, Andrew E. Ayers
  • Patent number: 6742178
    Abstract: The present invention is directed to a system and method for modifying a class file for the purpose of instrumenting without requiring separate files to correlate the instrumentation. A class file is instrumented with hooks. Each hook is injected in a method at a critical point in the code for tracking path flow, such as where the method will be entered or exited. Each hook includes an identifier to identify the method in which it is injected. Rather than using the method's name, hooks use unique major and minor codes to identify the method. Static initializers are declared for the class to output other hooks identifying the methods being instrumented. When a class is loaded, the static initializers are executed and hooks identifying the method name and the major and minor codes for each instrumented method are output to, for instance, a trace record. Then, when a method is entered or exited, the hooks identifying the entry or exit are also outputted to a trace record.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: May 25, 2004
    Assignee: International Business Machines Corporation
    Inventors: Robert Francis Berry, Weiming Gu, Riaz Y. Hussain, Frank Eliot Levine, Wai Yee Peter Wong
  • Patent number: 6732356
    Abstract: Systems and methods are provided through which compare instructions in computer code are eliminated partially resolving the predicate of the compare instructions. Partially resolved predicates are used to reduce the number of compares generated during the prediction phase of the compiler. In a partially resolved predicate, the predicate name is defined along the same paths as the fully resolved predicate counterpart, but it can be used to guard a subset of the instructions of the fully resolved predicate name. A partially resolved predicate is generated for predicate names which are only valid in a restricted control flow region. One or more of the control flow edges are ignored when computing control dependence. The predicate name relies partially on the actual ignored control flow edge to prevent incorrect usage of the predicate name.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: May 4, 2004
    Assignee: Intel Corporation
    Inventor: William Y. Chen
  • Patent number: 6728951
    Abstract: A system and method are described for providing automated incremental compilation of computer programs. The system has a library generation logic that generates a dynamic link library of a plurality of computer programs, and a work area creation logic that creates a program work area. A program copy logic copies at least one computer program into the program work area to enable the computer program to be modified. A program generation logic then generates an executable program that includes all of the computer programs in said program work area and the plurality of computer programs in the dynamic link library.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: April 27, 2004
    Assignees: Hewlett-Packard Development Company, L.P., Intel Corporation
    Inventors: James Douglas Gibson, Paul Donald Hylander
  • Patent number: 6725447
    Abstract: The system and method for graphic creation of a medical logical module in the Arden syntax file format allows a user to define a medical decision process in terms of flowcharts and outlines. The system and method provide for creation of a medical logical module for a computer in the Arden syntax file format. A graphic representation of a medical decision logic tree of a connected series of a plurality of nodes in a medical decision process is encoded, with each node having a logical path from the node, and each connected series of nodes containing at least one intermediate node and a concluding node. For each node, a conditional statement is encoded for each path from the node; a definition of a path for each intermediate node is encoded; and an outcome for each concluding node is encoded.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: April 20, 2004
    Assignee: Nellcor Puritan Bennett Incorporated
    Inventors: John Gilman, Eric F. Halsey, Michael E. Raymer
  • Patent number: 6718544
    Abstract: A user interface that allows a user to visually understand, inspect, and manipulate a compiled application program as a function of compiler options, such as, code size and speed, is provided.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: April 6, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Jonathan F. Humphreys, Alan S. Ward, Reid E. Tatge, David H. Bartley, Paul C. Fuqua
  • Patent number: 6718541
    Abstract: A method for scheduling operations utilized by an optimizing compiler to reduce register pressure on a target hardware platform assigns register economy priority (REP) values to each operation in a basic block. For each time slot, operations are scheduled in order of their lowest REP values.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: April 6, 2004
    Assignee: Elbrus International Limited
    Inventors: Alexander Y. Ostanevich, Vladimir Y. Volkonsky
  • Patent number: 6715141
    Abstract: A multiphase single pass interpreter switches modes of execution. The interpreter scans a program file in a scan phase until a tag signaling the presence of a script language is encountered. The interpreter then switches its mode to full parse phase where each line scanned is tokenized and parsed. Tokens are replaced with their dynamic content, if any. When the interpreter detects logic blocks, the interpreter changes its mode to p-code generation phase and generates p-code for the lines of code within the logic block. The generated p-code is then executed by the interpreter in its p-code execution phase. The interpretation is performed in a single pass through the program file.
    Type: Grant
    Filed: June 15, 2000
    Date of Patent: March 30, 2004
    Inventor: Bruce Hodge
  • Patent number: 6701513
    Abstract: The present invention relates to a program-development environment that allows developers to seamlessly switch between a visual programming paradigm and a textual programming paradigm, thereby permitting developers to choose the paradigm best suited for creating each aspect of the desired program. A graphical user interface (GUI) may be generated by the program-development environment, and displayed on the screen of a computer system. The GUI has several elements including a form window and a designer window. The form window is configured to receive one or more control objects selected by the developer, and the designer window is configured to display a symbolic representation of those control objects placed in the form window.
    Type: Grant
    Filed: January 14, 2000
    Date of Patent: March 2, 2004
    Assignee: Measurement Computing Corporation
    Inventor: Bendrix L. Bailey
  • Patent number: 6694510
    Abstract: A method for parsing a linked list to extract data therefrom includes the step of constructing a record list having a list element descriptor descriptive of data to be retrieved from a linked list. The method also includes the steps of following a list head locator of the list element descriptor to a head of the linked list, following links to a node of the linked list, interpreting a tag of the list element descriptor to locate data of the node, and extracting data from the node.
    Type: Grant
    Filed: November 3, 2000
    Date of Patent: February 17, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Richard A. Willems
  • Patent number: 6684390
    Abstract: A method and apparatus for supporting a host computer system in executing a JAVA computer program. An auxiliary system, including multiple non-host processors, coupled to a non-host memory, via a bus to the host computer system, interfaces with a JAVA Virtual Machine (JVM) to execute one or more threads of the JAVA computer program. The JVM can be instantiated in the non-host memory. The JVM performs allocation of an additional non-host processor for interfacing with the JVM to execute the new thread. The auxiliary system need not be a permanent part of the host computer system. In one embodiment the auxiliary system is coupled to the host computer system to run JAVA programs. The auxiliary system can be detached from the host computer system or can be implemented as a permanent part of the host computer system.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: January 27, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Lonnie C. Goff