Abstract: A parallel input/output combined encoding and syndrome generating system encodes two information symbols per clock cycle, and thereafter, produces two redundancy symbols per clock cycle. For an n-symbol code word with 2k information symbols cn−1, to cn−2k, the symbols cn−1, cn−3, cn−5 . . . are supplied, in turn, to a first input line while the symbols cn−2, cn−4, cn−6, . . . are supplied, in turn, to a second input line. In a first clock cycle, the symbol cn−1 is combined with the contents of the R registers, where R is the number of redundancy symbols, and the contents are multiplied by the respective roots of the generator polynomial. The products then are combined with the paired symbol cn−2 and the resulting sums are multiplied also by the roots of the generator polynomial. These products are then summed in a chain of R adders and the respective registers are appropriately updated with the results of the encoding of the two symbols.

Abstract: A Layer 2 Tunneling Protocol (L2TP) receiver performs a receiver initiated recovery algorithm (RIRA) when the number of lost or out-of-order payload packets exceed a predetermined value. In particular, the receiver maintains a number of variables: the “next sequence number expected to be received” (Sr) value, and Snl, which stores the value of the currently received “next sent” (Ns) sequence number from the latest received packet. When the value of Snl>Sr+adjustment, the receiver portion resets the value of Sr to the value of Snl and passes all packets to the upper layer of the protocol stack. The value of the adjustment variable represents the number of packets that may be dropped or out-of-order at the receiver before the receiver initiates recovery. The receiver also sends (either via piggybacking or a zero-length message) an ACK packet to inform the sender of the new Sr value at the receiver.

Abstract: A method and system for automatic negotiation of maximal shared data transmission and reception rates by fibre channel nodes in a fibre channel arbitrated loop. An auto-speed-negotiation function is included in the fibre channel arbitrated loop initialization procedure. A fibre channel node undergoing initialization turns off its transmitter in order to elicit a loss of synchronization condition in the next fibre channel node of the arbitrated loop. Upon detection of loss of synchronization, each subsequent fibre channel arbitrated loop node invokes the auto-speed-negotiation function. The fibre channel node then turns its transmitter back on at the highest possible data transmission rate, sets the data reception rate of the fibre channel node's receiver to the lowest possible data reception rate, and then waits to detect word synchronization by the receiver.

Abstract: The present invention provides a method, a computer medium, and a device for a two stage S_Random interleaver that is constructed based on two optimization criteria. The distance spectrum properties of the code are maximized by designing an interleaver that increases the minimum effective free distance of the code. In addition, the interleaver is designed to reduce the correlation properties of the extrinsic information that is fed into the next stage decoder. Thus, the present invention utilizes the reduced correlation properties to provide a more efficient S-random interleaver with increased iterations, thus maximizing the bit error rate (BER) performance of the code with respect to iterative decoding.

Abstract: An apparatus that can determine whether a Tva parameter and a Tvb parameter of a device under test (DUT) complies with a design specification where the device under test is coupled to a secondary device. The Tvb parameter corresponds to a setup time of the secondary device. The Tva parameter corresponds to the hold time of the secondary device. The apparatus allows the DUT to be coupled to a secondary device that normally operates with the DUT. The apparatus writes data to the DUT and secondary device. The data is then written back to the apparatus which then determines whether the DUT complies with the Tvb and Tva design specifications. The apparatus may also implement tunable delay circuits to compensate for different setup and hold times of the secondary device.

Abstract: Disclosed is a method and apparatus for increasing the reliability of a disk drive. A block of information is read from a storage medium to provide a first sample, which is stored. The method determines whether an uncorrectable error occurred during the reading, and when the error is determined to have occurred, the block of information is reread from the storage medium to provide an averaged sample, and the average sample is decoded. Further disclosed is a storage unit, which includes a reader for reading a block of information from a storage medium to provide a first sample and for storing said first sample. An error determining mechanism determines whether an uncorrectable error occurred during the reading and issues a command to the reader to re-read the block of information to provide a second sample when the uncorrectable error is determined. A processor receives and averages the first sample and the second sample and produces an averaged sample. A decoder decodes the average sample.

Abstract: In encoding method and device for encoding m-bit data to an n-bit code, the n-bit code is generated according to a finite state transition diagram representing the restriction of ADS and RDS received by a code sequence; two states contained in a state assembly set as start points of the n-bit code in the finite state transition diagram exist at symmetrical positions with respect to the center point of the finite state transition diagram, at symmetrical positions with respect to the ADS axis passing through the center point of the finite state transition diagram or at the symmetrical positions with respect to the RDS axis passing the center point of the finite state transition diagram; the m-bit data are encoded to an n-bit code word having as a start point a predetermined state contained in a state assembly set as start points of the code; and an n-bit code word having as a start point another state contained in a state assembly set as start points by the code is obtained by further converting the encoded cod