Patents Examined by Matthew A. Henry
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Patent number: 7124290Abstract: A computer system includes a mass storage unit, the mass storage unit comprising: a first portion which contains a first operating system; a second portion distinct from the first portion; wherein: the second portion stores the value of an address comprised in the first portion and at which a boot record of the first operating system is located; the first portion has a sub-portion containing a second operating system; the second portion further stores the value of another address comprised in the first portion and which is the address of a boot record of the second operating system, whereby the second operating system can be activated without the first operating system being active.Type: GrantFiled: July 2, 2002Date of Patent: October 17, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Jean-Francois Larvoire, Bruno Richard
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Patent number: 7107366Abstract: A system and method update client computers of various end users with software updates for software products installed on the client computers, the software products manufactured by diverse, unrelated software vendors. The system includes a service provider computer system, a number of client computers and software vendor computer systems communicating on a common network. The service provider computer system stores in an update database information about the software updates of the diverse software vendors, identifying the software products for which software updates are available, their location on the network at the various software vendor computer systems, information for identifying in the client computers the software products stored thereon, and information for determining for such products, which have software updates available. Users of the client computers connect to the service provider computer and obtain a current version of portions of the database.Type: GrantFiled: June 5, 2003Date of Patent: September 12, 2006Assignee: McAfee, Inc.Inventors: William Cheng, Kenneth Hwang, Ravi Kannan, Babu Katchapalayam, Bing Liu, Balaji Narasimhan, Gopal Ramanujam, Jonathan Tran
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Patent number: 7093113Abstract: A method of using a dynamic computing environment to facilitate a sales preparation of a first software is provided. The method comprises configuring the dynamic computing environment for a first hardware, a first software environment and a first network configuration, preparing for sales of the first software using the first hardware, the first software environment, and the first network configuration of the dynamic computing environment, configuring the dynamic computing environment for a second hardware, a second software environment, and a second network configuration; and preparing for sales of the first software using the second hardware, the second software environment, and the second network configuration of the dynamic computing environment. A method of using dynamic computing environments to facilitate a sales demonstration by a sales team and an evaluation by a customer is also provided.Type: GrantFiled: June 25, 2001Date of Patent: August 15, 2006Assignee: VERITAS Operating CorporationInventor: Thiruvillamalai K. Lakshman
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Patent number: 7010679Abstract: Computer equipment using a plurality of BIOS versions. The equipment includes a selecting device, a memory device, and a CPU. The selecting device provides a selecting signal responding to the BIOS version. The memory device is coupled to the selecting device to store the BIOS version, and outputs the responding BIOS version according to the selecting signal. The CPU is coupled to the memory device to load the responding BIOS version.Type: GrantFiled: July 15, 2002Date of Patent: March 7, 2006Assignee: Mitac Technology Corp.Inventor: Tsung-Ju Yang
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Patent number: 6961848Abstract: An alternative boot methodology that begins with legacy-free firmware allows the peaceful coexistence of legacy-free and legacy option ROMs in a system. Legacy-free firmware provides a legacy-free boot path from system power up to operating system loading. This legacy-free boot path is independent of any legacy firmware. A legacy-free boot manager boots from an ordered list of OS loaders. If a legacy boot option is available, legacy-free drivers that have already been loaded may be stopped, and a legacy boot using legacy firmware may be initiated, without having to reboot the system.Type: GrantFiled: December 11, 2001Date of Patent: November 1, 2005Assignee: Intel CorporationInventors: Andrew J. Fish, Michael D. Kinney
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Patent number: 6957353Abstract: A system and method to intelligently control power consumption of distributed services using a computer system that provides independent computing elements each capable of entering a power saving mode. The first algorithm is a reduced load power saving algorithm. As the load decreases, duplicate instances of services can be gracefully suspended and the host processor cards hosting these instances can enter a power saving mode. The second algorithm is a priority-based power consumption reduction algorithm. If power consumption must be reduced, services having less of a contribution to revenue are suspended before components that having a higher contribution to revenue. The third algorithm is a minimal power-consuming redundant computing hardware algorithm that allows a “cold spare” host processor card to be pressed into service if another card fails.Type: GrantFiled: October 31, 2001Date of Patent: October 18, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Kirk M. Bresniker, Thane M. Larson
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Patent number: 6934872Abstract: A method and apparatus for optimizing clock distribution in a circuit to reduce the effect of power supply noise. Parameters are determined including: a response curve of a power source for a circuit, a delay sensitivity of a clock net in the circuit to the power source, a delay sensitivity of a data net in the circuit to the power source, a data delay for the data net, and a clock delay for the clock net. The clock delay is adjusted to reduce the effect of power supply noise on the data net. The adjusting is based on the response curve of the power source, the delay sensitivity of the clock net, the delay sensitivity of the data net, the data delay, and the clock delay. The adjusting includes adding a pre-distribution clock delay.Type: GrantFiled: December 19, 2001Date of Patent: August 23, 2005Assignee: Intel CorporationInventors: Keng L. Wong, Hung-Piao Ma, Tawfik M. Rahal-Arabi, Javed Barkatullah, Edward A. Burton
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Patent number: 6883102Abstract: The present invention provides a data processing apparatus and method for testing power management instructions. The data processing apparatus comprises a processor for executing data processing instructions including power management instructions, at least one of the power management instructions being a command power management instruction. A power management controller is also provided for receiving command data from the processor when a command power management instruction is executed by the processor, and to control power management logic to perform an associated set of power management functions dependent on the command data. The data processing apparatus includes first power management logic controllable by the power management controller, with the power management controller also having an interface to enable communication with additional power management logic.Type: GrantFiled: December 18, 2001Date of Patent: April 19, 2005Assignee: ARM LimitedInventors: Gerard Richard Williams, III, Kim Rasmussen, David Walter Flynn
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Patent number: 6836852Abstract: Methods and systems for generating and synchronizing multiple clocks are disclosed herein that have extremely low skew across multiple channels and latency that is both minimal and well-defined. A phase-locked loop circuit generates a plurality of clock signals to synchronize channel circuits that receive core data streams. The channel circuits convert the core data streams into serial data streams. The phase-locked loop circuit or another phase-locked loop circuit generates a core clock signal for the registered transfer of the core data streams to the channel circuits. One or more of the plurality of clock signals may be distributed to the channel circuits by a register-to-register transfer.Type: GrantFiled: October 29, 2001Date of Patent: December 28, 2004Assignee: Agilent Technologies, Inc.Inventors: Charles L. Wang, Benny W. H. Lai, Charles E. Moore, Philip W. Fisher