Abstract: Embodiments of the present invention provide a method, system and computer program product for dynamic caching module selection for optimized data deduplication. In an embodiment of the invention, a method for dynamic caching module selection for optimized data deduplication is provided. The method includes processing historically relevant byte streams in each of a multiplicity of byte caching modules to populate a table of associations between different classifications of the historically relevant byte streams and correspondingly optimal ones of the multiplicity of the byte caching modules. The method also includes receiving a request to retrieve data from a data source and classifying the request. The method yet further includes consulting the table to identify, from amongst the multiplicity of byte caching modules, a particular byte caching module associated with the classification of the request. Finally, the method includes deduplicating the data in the identified byte caching module.

Abstract: A system and method of operation exploit the limited associativity of a single cache set to force observable cache evictions and discover conflicts. Loads are issued to input memory addresses, one at a time, until a cache eviction is detected. After observing a cache eviction on a load from an address, that address is added to a data structure representing the current conflict set. The cache is then flushed, and loads are issued to all addresses in the current conflict set, so that all known conflicting addresses are accessed first, ensuring that the next cache miss will occur on a different conflicting address. The process is repeated, issuing loads from all input memory addresses, incrementally finding conflicting addresses, one by one. Memory addresses that conflict in the cache belong to the same partition, whereas memory addresses belonging to different partitions do not conflict.

Abstract: A method for removal of an offlining cache agent, including: initiating an offlining of the offlining cache agent from communicating with a plurality of participating cache agents while a first transaction is in progress; setting, based on initiating the offlining, an ignore response indicator corresponding to the offlining cache agent on each of the plurality of participating cache agents; offlining, based on setting the ignore response indicator, the offlining cache agent; and ignoring, based on setting the ignore response indicator, a first response to the transaction from the offlining cache agent.

Abstract: A method includes reading a superblock of a read-only replica of a source virtual volume in a source virtual storage partition associated with a source aggregate of a source storage system at the destination storage system, modifying the superblock of the read-only replica in a memory of the destination storage system, and associating the modified superblock with one or more virtual volume block number(s) configured to be previously associated with the superblock of the read-only replica of the source virtual volume without initiating a destination consistency point (DCP) at the destination storage system to render the destination virtual volume writable. The method also includes modifying a disk group label to reflect an association of the destination storage disk with the writable destination virtual volume, and initiating DCP to ensure that the modified superblock and the modified disk group label are flushed to the destination storage disk.

Abstract: An apparatus includes an interface and a processor. The interface is configured to communicate with a memory device. The processor is configured to send to the memory device, via the interface, a sequence of write commands that program multiple types of memory pages that incur respective different programming durations in the memory device, while inserting in the sequence suspension periods for permitting execution of storage commands that are not part of the sequence, such that at least some of the suspension periods are followed by write commands of types that do not have a shortest programming duration among the programming durations.

Abstract: Electrical interfaces, addressing schemes, and command protocols allow for communications with memory modules in computing devices such as imaging and printing devices. Memory modules may be assigned an address through a set of discrete voltages. One, multiple, or all of the memory modules may be addressed with a single command, which may be an increment counter command, a write command, a punch out bit field, or a cryptographic command. The commands may be transmitted using a broadcast scheme or a split transaction scheme. The status of the memory modules may be determined by sampling a single signal that may be at a low, high, or intermediate voltage level.

Abstract: Technologies are described herein related to multi-core processors that are adapted to share processor resources. An example multi-core processor can include a plurality of processor cores. The multi-core processor further can include a shared register file selectively coupled to two or more of the plurality of processor cores, where the shared register file is adapted to serve as a shared resource among the selected processor cores.

Abstract: In general, in one aspect, the invention relates to a system that includes memory and a prediction subsystem. The memory includes a first memgroup and a second memgroup, wherein the first memgroup comprises a first physical page and a second physical page, wherein the first physical page is a first subtype, and wherein the second physical page is a second subtype. The prediction subsystem is configured to obtain a status value indicating an amount of freed physical pages on the memory, store the status value in a sample buffer comprising a plurality of previous status values, determine, using the status value and the plurality of previous status values, a deficiency subtype state for the first subtype based on an anticipated need for the first subtype on the memory, and instruct, based on the determination, an allocation subsystem to coalesce the second physical page to the first subtype.

Abstract: A rapid virtual machine (VM) cloning technique is provided that creates cloned VMs on hosts from multiple source VMs, rather than a single source VM that may otherwise be a bottleneck. The described technique selects particular hosts, disposed in particular racks, on which to create VM clones in a dynamic manner that reduces total deployment time for the plurality of VMs. A rapid VM reconfiguration technique is also provided that reduces the time spent reconfiguring the provisioned VMs for use in a distributed computing application.

Abstract: If a monitor measurement cycle is set as a long cycle, promotion in a short cycle cannot be performed; and even if the number of I/Os is very large in response to fluctuations of the number of I/Os in several minutes to several hours of normal work, pages will be promoted after waiting for several weeks. As a result, I/Os which could have normally accepted by an upper tier will be accepted by a lower tier, which results in a problem of worsening the performance efficiency. A monitoring system capable of preventing demotion due to temporary reduction of the number of I/Os for specific pages from a viewpoint of a long cycle and enabling prompt promotion in response to an increase of the number of U/Os for 3 the specific pages is realized. A load index value defined from a viewpoint of a long cycle and a load index value defined from a viewpoint of a short cycle are updated based on the number of I/Os which is counted cyclically for each storage area.

Abstract: A method for upgrading storage processors in a storage system includes a first storage processor performing IO requests on a first one or more logical units, and a second storage processor performing IO requests on a second one or more logical units of the plurality of logical units. The method includes causing the first storage processor to stop performing the IO requests on the first one or more logical units and the second storage processor to perform the IO requests on the first one or more logical units. The method includes causing the second storage processor to stop performing the IO requests on the first one or more logical units of the plurality of logical units and a third storage processor to perform the IO requests on the first one or more logical units.

Abstract: A technique for managing I/O operations in data storage systems having one or more multi-core processors is provided. A first variable stored in shared memory is configured to simultaneously store a counter associated with a number of I/O operations outstanding and a gate bit value associated with a gate condition. I/O operations are tracked by incrementing the counter value when an I/O operation is received and decrementing the counter value when an I/O operation is processed. If a storage object is identified as requiring a state change, the gate bit is set to queue any subsequent I/O operations. Outstanding I/O operations are drained by processing I/Os until the counter reaches zero. Any necessary operations are performed during the state change condition. The gate bit is cleared and I/O processing resumes. Atomic increment, decrement, OR and AND instructions provide synchronization across the multiple cores.

Abstract: A method and apparatus is described herein for accessing a physical memory location referenced by a physical address with a processor. The processor fetches/receives instructions with references to virtual memory addresses and/or references to physical addresses. Translation logic translates the virtual memory addresses to physical addresses and provides the physical addresses to a common interface. Physical addressing logic decodes references to physical addresses and provides the physical addresses to a common interface based on a memory type stored by the physical addressing logic.

Abstract: A processing apparatus externally receives a processing request and executes the requested processing. The processing apparatus transmits the result of the processing to a processing request source if a connection to the processing request source is maintained until the requested processing is executed. The processing apparatus stores the result of executing the processing in a memory if the connection to the processing request source is disconnected before the end of the requested processing. The processing apparatus transmits the processing result stored in the memory to the processing request source if the processing requested when the processing request is received is executed but is stored in the memory.

Abstract: A storage network system that prevents waste of a core's resources and is thereby operated efficiently, and a method for controlling such a storage network system are provided. Policy differences between a core and a plurality of edges are buffered by enabling hierarchical control of data storage on the side of the plurality of edges in cooperation with hierarchical control of data storage on the core side, and the buffered policy is applied to the hierarchical control of the data storage on the core side.

Abstract: A method for priority promotion of a service request comprises receiving the service request for a target address space into a set of work requests, the set of work requests comprising a plurality of service requests for the target address space, the service request originating from a source address space, the service request having a priority equivalent to a priority of the target address space, the source address space having a higher priority than the target address space; determining a number of service requests for the target address space in the set of work requests; and, in the event the number of service requests for the target address space exceeds a predetermined value, promoting the priority of the service request to the priority of the source address space.

Abstract: Data writers desiring to update data without unduly impacting concurrent readers perform a synchronization operation with respect to plural processors or execution threads. The synchronization operation is parallelized using a hierarchical tree having a root node, one or more levels of internal nodes and as many leaf nodes as there are processors or threads. The tree is traversed from the root node to a lowest level of the internal nodes and the following node processing is performed for each node: (1) check the node's children, (2) if the children are leaf nodes, perform the synchronization operation relative to each leaf node's associated processor or thread, and (3) if the children are internal nodes, fan out and repeat the node processing with each internal node representing a new root node. The foregoing node processing is continued until all processors or threads associated with the leaf nodes have performed the synchronization operation.

Abstract: Data writers desiring to update data without unduly impacting concurrent readers perform a synchronization operation with respect to plural processors or execution threads. The synchronization operation is parallelized using a hierarchical tree having a root node, one or more levels of internal nodes and as many leaf nodes as there are processors or threads. The tree is traversed from the root node to a lowest level of the internal nodes and the following node processing is performed for each node: (1) check the node's children, (2) if the children are leaf nodes, perform the synchronization operation relative to each leaf node's associated processor or thread, and (3) if the children are internal nodes, fan out and repeat the node processing with each internal node representing a new root node. The foregoing node processing is continued until all processors or threads associated with the leaf nodes have performed the synchronization operation.

Abstract: To provide a storage management technique for creating and managing, with single operation by a user, a large quantity of writable snapshots, which satisfy a requirement desired by the user, while controlling a use form of a storage apparatus not to exceed limits of the performance and the capacity of the storage apparatus. Therefore, a management computer manages configuration information and performance information of plural storage apparatuses and an operation state of a writable snapshot. When a writable snapshot is created, the management computer controls, concerning an original snapshot, a use form of the storage apparatuses not to exceed a disk performance limit and a controller performance limit and a capacity limit of a storage on the basis of the number of writable snapshots to be created and a performance requirement (IOPS) and a capacity requirement of the writable snapshot.

Abstract: To create one pool by using a plurality of storage apparatuses and to provide virtual volumes common to each of the storage apparatuses to the server. The respective logical volumes 220 which the plurality of storage apparatuses 10 (i) to (3) comprise are mutually connected. The respective logical volumes are managed in the one pool 230. The virtual volumes 240 are created by utilizing the storage area in the pool. Each of the storage apparatuses shares at least part of the management information related to the page assignment for the virtual volumes with the other storage apparatuses.