Abstract: A switch level simulator having switch level speeds with near the accuracy of a circuit level simulator. Circuit parameters such as peak current, delay, and charge are calculated by using a dynamic short-circuit ratio. In the preferred embodiment a computer having a processor and memory is used to run the circuit simulations. A lookup table is built which represents how the circuit parameters vary with a change in the dynamic short-circuit ratio. The dynamic short-circuit ratio is calculated by taking the ratio of a first resistance in a first circuit path switching OFF to a second resistance in a second circuit path switching on. The circuit paths might be a parallel or series set of transistors which need to be combined to form an effective resistance for each path. The calculated dynamic short-circuit ratio is then used in the lookup table to determine the parameters in question.

Abstract: The present invention discloses a disk array access management system connected between a host computer and at least two independent concurrently operational disk arrays. Each of these arrayas includes a plurality of disks, the disk access management system includes a central processing unit (CPU) executable extension device directly accessible and executable by a CPU of the host computer. The disk access management system further includes a concurrent disk array interface device for interfacing with the concurrent disk arrays for performing disk accesses from the host computer to the disks. The CPU executable extension device is employed for initializing, configuring and controlling the concurrent disk array interface device in performing the concurrent disk accesses operations under direct control of the CPU.

Abstract: The present invention describes a novel method and apparatus for sampling an input/output pin of an electronic device at high speeds, comprising the steps of: driving the device input/output pin through a series resistor with a middle voltage between the high and low voltages of the device; sampling and latching the voltage at the input/output pin; comparing the latched voltage at the device input/output pin with a high threshold voltage which is between the high voltage of the device and the middle voltage; comparing the latched voltage at the device input/output pin with a low threshold voltage which is between the low voltage of the device and the middle voltage; and using the results of the two comparisons to determine whether the device input/output pin is driving high, driving low, or in an input mode.

Abstract: In an apparatus and a method for controlling centrifugal separator, simulation is performed, in Steps S1 to S4, for the process before and after change of parameters as centrifugation condition. The results are compared in Step S10, and operation of the centrifugal separator is controlled in Step S11. To obtain the measured data of the specimen, an attachment for analysis 15 is used, and the results are compared with the results of simulation, and parameters are corrected. To display the process in the middle of centrifugation, simulation is performed using the current parameters during operation of centrifugation, and the results are shown by graphic display on a display unit 2.

Abstract: A video display engineering and optimization CAD simulation system for designing a LCD display integrates models of a display device circuit, electro-optics, surface geometry, and physiological optics to model the system performance of a display. This CAD system permits system performance and design trade-offs to be evaluated without constructing a physical prototype of the device. The systems includes a series of modules which permit analysis of design trade-offs in terms of their visual impact on a viewer looking at a display.

Abstract: Methods and apparatus for representing a three-dimensional object by means of a High Density Point Data Model (HDPDM) consisting of a large number of individual data values, each of which specifies the coordinates of a point on the surface of a three dimensional object. An initial HDPDM is produced by scanning a physical object, tessellating the elements of a CAD representation of the object surface, or evaluating mathematical expressions which describe the surface. Further data values define a virtual tool surface which is spaced from the modeled object surface. The projection of the virtual tool surface on the object surface along projection lies parallel to a defined axis of projection identifies selected points on the surface which are modified by effectively moving them to the tool surface.

Abstract: A configurable logic system programmed to model a logic design comprises an array of programmable logic modules each configured to perform a partition block of the logic design and a module interconnect providing connections between the modules. The interconnect enables transmission of global links between the partition blocks of the modules. The modules time division multiplex the global links, with a destination module then demultiplexing the global links allowing the links to pass through to another FPGA. The modules are configured to transmit individual ones of the global links at time intervals determined in response to a ready time of the individual links. The ready times of individual global links are determined in response to receipt of parent global links and signal propagation delays across the modules. A parent of a particular global link is a link that affects a logic value of the global link. The present invention allows computation and communication simultaneously.

Abstract: A digital logic simulation system simulates a digital logic system having component blocks connected by nets with a master queue that contains events to be performed during the simulation, a scheduler that adds events to the master queue such that the processing of each block is represented by an update event and a compute event, and a dispatcher that maintains a time clock that defines a simulation clock time, extracts events from the master queue according to the simulation clock time, and produces a simulation output, such that wire delays for particular nets are modelled with a corresponding update event and compute event. Only those nets that have an associated wire delay that is being modelled will cause a wire delay update event and compute event. All other nets will not result in wire delay events.

Abstract: Method and apparatus for automating the process of characterizing a standard cell library at multiple operating points is disclosed. In a departure from the art, a CHARS utility of the present invention sensitizes each arc of each cell of the cell library and then runs a matrix of experiments, stepping input transition times against output loads, for each sense of each arc of each cell to compute timing model timing coefficients for input to a synthesis and optimization tool such as SYNOPSYS. In a preferred embodiment, CHARS is implemented using a two pass HSPICE algorithm and each pass comprises generating a set of HSPICE decks for each sense of each arc in each cell and then running HSPICE to simulate the timing behavior of the cell. The first pass generates HSPICE decks for computing pin capacitances, input threshold voltage and the maximum load the cell can drive. The second pass uses the information generated during the first pass to do a detailed characterization analysis on the cell.

Abstract: A computer-implemented method and apparatus allowing a user to select a data transformation for converting input data to output data without having to perform complicated programming. An interactive graphic display provider menu display options which enable a user to generate input and output graphic display templates by selecting data items such as scalars, arrays, lattices, and sets from a data palette. The user then identifies a selected data transformation by making assignments between data items in the input template and the output template. A user interface manager passes information regarding the assignments to a processor which generates a data transform program based on the assignment information. A data chopping module then executes the data transform program to convert input data.

Abstract: An apparatus and method for determining the course of a patient's illness and response to treatment. The system uses a matrix of coordinated, nonlinear time plots to guide diagnosis and record treatment. The preferred method comprises representing patient findings and treatments as a matrix of small graphs each comprised of a label, the numeric value of the most recent plotted value, plotted values themselves and axis markers. The graphs are coordinated so that plots in the same column share the same horizontal time axis and plots in the same row share the same vertical clinical value axis. Nonlinear scales are used to allow both recent and historical trends to be presented on the same axis and to allow various clinical values to be presented on the same axis. The system also presents a small of amount of textual information about the patient to identify and annotate the graphical presentation.

Abstract: The sequential order of movements of a number of probes within a circuit test fixture is optimized through the use of an algorithm which sequentially orders test configurations provided in an input list. Each test configuration corresponds to the locations of probes within the fixture as a particular test is performed. In a first pass of the algorithm, for each test configuration, every other test configuration is considered as a next move candidate for which a weighted distance is calculated from the test configuration. Weighting factors reflect the degree of difficulty in moving one direction instead of another. A need to move one probe before another or to move in one direction before another, in order to prevent a collision within the test fixture, is also considered. A predetermined number of next move candidates having the lowest weighted distances are placed in an intermediate list for the test configuration.

Abstract: A method of controlling a circuit simulator for examining the electromagnetic behaviour of an electrical conductor pattern is based on reducing the equivalent circuit model of the pattern. The pattern is first represented by a collection of geometrical elements, whose size is determined by the scale of the geometrical details that is well below the minimum wavelength contemplated. Selection of a set of those elements that lie approximately at a distance of one wavelength from one another and expressing the field values of the non-selected elements in terms of the field values for the selected elements permits correlating a low rank admittance matrix and the matrices of the Maxwell equations. Typically, an effective reduction of four orders of magnitude in the number of equivalent circuit components is obtained without losing model accuracy.

Abstract: Techniques are disclosed for optimizing the prediction of RF propagation. A three-dimensional environment, such as a building, is modeled as a plurality of two-dimensional cross-sectional areas including a plurality of surfaces. Each surface is associated with a reflection coefficient and a transmission coefficient. A reference transmitter location and a plurality of reference receiver locations are selected. For each reference receiver location, RF propagation paths are determined with respect to the reference transmitter location. The reference transmitter location and the reference receiver locations represent propagation path endpoints. A plurality of parallel planes are used to partition the three-dimensional environment into a plurality of intervals. The RF reflective surfaces and propagation paths within each interval are projected into a cross-sectional area. A plurality of line segments are positioned in the cross-sectional area to form a plurality of triangular areas.

Abstract: The present invention relates to an integrated digital bus simulator system for automatically testing electronic packages embarked on an aircraft including a computer. This bus simulator is able to reconfigured under the control of the computer of the system by reconfigurating its hardware and software so as to simulate the digital buses used on the aircraft. The system includes a bus simulation module which is reconfigurable in accordance with the bus to be simulated and with the wired logic downloaded into this module so as to adapt the architecture of the hardware to the purpose of the bus to be simulated.

Abstract: With the invention, a method is described which permits a DP-based setting up of models for simulators. A prescribed set of data pairs, in the form in which it can for example be taken from a data sheet, is automatically interpolated. "Kinks" and extreme points in the function curves can be explicitly prescribed. Using the method according to the invention, shorter simulation times are possible and said method gives more precise results.

Abstract: Computer generated refined profiles for a pair of cooperating screw motors includes an initial profile for a female rotor and for a male rotor. The initial profiles are refined using an iterative procedure, and the female profile includes a groove having a leading flank comprising a generally circular arc connected to points which are developed by the iterative procedure to produce minimum clearances between these points and critical male points, such as the male tip and male root. The initial male profile is refined using the iterative procedure, and includes a surface generated to minimize the clearance with meshing female surfaces. The refined profiles, and a helix angle are used to define rotors having surfaces with pitch diameters located near a male root, thereby eliminating the "blow hole" leak and minimizing leak at the points where the female tip meshes near the male root.

Abstract: A method of designing an optimum skeleton structure uses a computer to obtain a skeleton structure from a density distribution within a 2 or 3 dimensional design region which is obtained as an optimum shape of a mechanical structure, where the design region is divided into finite elements each having a density D assigned thereto. The method includes the steps of (a) inputting a first reference value D.sub.S of the density D, (b) regarding a point within the design region where an external force is applied as one of starting point candidates, (c) selecting a starting point which is non-selected from the starting point candidates, (d) extending a line from the starting point and passing through the finite element satisfying D.gtoreq.D.sub.S so that the line is as straight as possible, and (e) stopping the extension of the line and regarding the line as a skeleton member when no adjacent finite element satisfying D.gtoreq.D.sub.S exists or when a non-selected starting point candidate is reached.