Patents Examined by Matthew R Chrzanowski
  • Patent number: 7991972
    Abstract: Provided are a method, system, and article of manufacture for determining whether to use a full volume or repository for a logical copy backup space. A determination is made of a source volume to backup using a logical copy operation. The logical copy operation is completed upon indicating the source volume data to backup. During a logical copy duration, point-in-time data in the source volume as of a point-in-time when the logical copy was established is copied to a backup space in response to receiving an update to the point-in-time data. A history of writes to the source volume is processed to determine whether to allocate a full target volume as the backup space providing a corresponding data unit for each data unit in the source volume or allocate a repository as the backup space, wherein the repository uses less storage space than the full target volume. The logical copy operation using the determined full target volume or repository as the backup space is initiated.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: August 2, 2011
    Assignee: International Business Machines Corporation
    Inventors: Michael Thomas Benhase, Shachar Fienblit, Yu-Cheng Hsu, Matthew Joseph Kalos
  • Patent number: 7984233
    Abstract: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. The file based interface between the host and memory systems allows the memory system controller to utilize the data storage blocks within the memory with increased efficiency.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: July 19, 2011
    Assignee: SanDisk Corporation
    Inventor: Alan W. Sinclair
  • Patent number: 7970980
    Abstract: A computer system includes at least one processor, multiple memory modules embodying a main memory, a communications medium for communicating data between the at least one processor and main memory, and memory access control logic which controls the routing of data and access to memory. The communications medium and memory access control logic are designed to accommodate a heterogenous collection of main memory configurations, in which at least one physical parameter is variable for different configurations. The bits of the memory address are mapped to actual memory locations by assigning fixed bit positions to the most critical physical parameters across multiple different module types, and assigning remaining non-contiguous bit positions to less critical physical parameters. In the preferred embodiment, the computer system employs a distributed memory architecture.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: June 28, 2011
    Assignee: International Business Machines Corporation
    Inventors: Philip Rogers Hillier, III, Joseph Allen Kirscht, Jamie Randall Kuesel
  • Patent number: 7966473
    Abstract: The invention concerns a method for read-addressing a site among a plurality of storage units using a coded address derived from an instruction. The method comprises the following steps: a) predicting (104) the storage unit corresponding to the site to be addressed; b) decoding (108) the address of the site to be addressed and determining (109) the storage unit to be addressed; c) managing (105) a potential read and rewrite conflict assuming that the predicted storage unit is the storage unit to be addressed; d) controlling (111) the addressing of the predicted storage unit at the end of the managing step (105); e) at the end of step b), determining (110) whether the storage unit to be addressed corresponds to the predicted storage unit; and f) if the storage unit to be addressed does not correspond to the predicted storage unit, managing (115) a possible read and rewrite conflict in the storage unit to be addressed and addressing the site of the storage unit to be addressed.
    Type: Grant
    Filed: April 17, 2002
    Date of Patent: June 21, 2011
    Assignees: STMicroelectronics S.A., Infineon Technologies AG
    Inventors: Jean-Paul Henriques, Fabrice Devaux
  • Patent number: 7949819
    Abstract: According to an example embodiment, a method of changing a block size in a flash memory device having a multi-plane scheme may include decoding an external input address and changing the block size of the flash memory device from a first block size to a second block size. The external input address may be decoded into a block address and a page address. The block size of the flash memory device may be changed from the first block size to the second block size by shifting at least one bit of the block address to the page address or shifting at least one bit of the page address to the block address.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: May 24, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-chul Kang, Jin-yub Lee
  • Patent number: 7941585
    Abstract: A RISC-type processor includes a main register file and a data cache. The data cache can be partitioned to include a local memory, the size of which can be dynamically changed on a cache block basis while the processor is executing instructions that use the main register file. The local memory can emulate as an additional register file to the processor and can reside at a virtual address. The local memory can be further partitioned for prefetching data from a non-cacheable address to be stored/loaded into the main register file.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: May 10, 2011
    Assignee: Cavium Networks, Inc.
    Inventors: David H. Asher, David A. Carlson, Richard E. Kessler
  • Patent number: 7941620
    Abstract: A data-allocation data-replication system includes a controller adapted to respond to back-up requests from host systems by first allocating an accumulated data set containing multiple source data sets. An index data set is then allocated incorporating index keys and other information helpful to restore the source data sets, such as locations of individual source data sets within the accumulated data set.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: May 10, 2011
    Assignee: International Business Machines Corporation
    Inventors: Justin P. Eastman, John G. Thompson
  • Patent number: 7930495
    Abstract: A method for resilvering a storage pool includes identifying a live block in the storage pool, determining whether a birth time associated with the live block is on a dirty time log (DTL), and resilvering the live block, if the birth time is on the DTL.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: April 19, 2011
    Assignee: Oracle America, Inc.
    Inventors: Jeffrey S. Bonwick, William H. Moore
  • Patent number: 7925822
    Abstract: An erase count of a flash memory block which is lost, e.g., due to power failure is updated or replaced by using known erase counts of other blocks of the flash memory. A flash management algorithm assigns a new erase count value instead of the lost one based on either a maximum value, an average value or a value combining the maximum value of the known erase counts and some tolerance value. The known values may be obtained from wear leveling data or from a stored erase history.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: April 12, 2011
    Assignee: SanDisk IL Ltd
    Inventor: Amir Mosek
  • Patent number: 7925827
    Abstract: A method for storing a block in a file system includes attempting to store the block at a location on a disk, where the block is associated with a birth time and is selected from a group consisting of a data block and an indirect block, and updating a dirty time log (DTL) with the birth time if the block is not stored successfully on the disk.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: April 12, 2011
    Assignee: Oracle America, Inc.
    Inventors: William H. Moore, Jeffrey S. Bonwick
  • Patent number: 7882299
    Abstract: A method of programming a non-volatile memory array using an on-chip write cache is disclosed. Individual data packets received by the memory system are stored in cache memory. More than one data packet may be stored in this way and then programmed to a single page of the non-volatile array. This results in more efficient use of storage space in the non-volatile array.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: February 1, 2011
    Assignee: SanDisk Corporation
    Inventors: Kevin M. Conley, Yoram Cedar
  • Patent number: 7877543
    Abstract: A system (and associated method) comprises a storage drive and a central processing unit (“CPU”). The storage drive is adapted to accommodate a removable storage medium. The CPU is configured to cause the CPU to write data and a time value to each of a plurality of addressable units of the storage medium in which data is written. The time value is indicative of the time at which each addressable unit was written with data.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: January 25, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Charles R. Weirauch, Jakob Gerrit Nijboer, Christiaan Steenbergen
  • Patent number: 7877540
    Abstract: Files that are mapped to a logical address range by a host become logically fragmented prior to being sent to a memory system. Subsequently, the logically fragmented portions are reassembled when they are stored in blocks in the memory system. The host supplies information to the memory system regarding file-to-logical mapping of data prior to sending the data. The memory selects storage locations for the data based on the files to which the data belong.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: January 25, 2011
    Assignee: SanDisk Corporation
    Inventor: Alan Welsh Sinclair
  • Patent number: 7877554
    Abstract: A system includes a storage pool including a first disk and a second disk, a data management unit (DMU), and a storage pool allocator (SPA). The SPA is configured to receive a request from the DMU to write a logical block, allocate a first physical block on the first disk, attempt to write the logical block to the first physical block, and allocate a second physical block on the second disk, if the attempt to write the logical block to the first physical block fails.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: January 25, 2011
    Assignee: Oracle America, Inc.
    Inventors: Jeffrey S. Bonwick, William H. Moore, Matthew A. Ahrens
  • Patent number: 7877539
    Abstract: Host system data files are written directly to a large erase block flash memory system with a unique identification of each file and offsets of data within the file but without the use of any intermediate logical addresses or a virtual address space for the memory. Directory information of where the files are stored in the memory is maintained within the memory system by its controller, rather than by the host. The file based interface between the host and memory systems allows the memory system controller to utilize the data storage blocks within the memory with increased efficiency.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: January 25, 2011
    Assignee: SanDisk Corporation
    Inventors: Alan W. Sinclair, Peter J. Smith
  • Patent number: 7873799
    Abstract: A method for writing data to a storage pool, involving receiving a first write operation to write a first block to the storage pool, determining a first replication type for the first block using a first replication policy associated with the first block, determining a first number of physical blocks required to write the first block to the storage pool using a size of the first block and the first replication type, and writing the first block, in accordance with the first replication policy, to the storage pool by filling in the first number of physical blocks.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: January 18, 2011
    Assignee: Oracle America, Inc.
    Inventors: Jeffrey S. Bonwick, William H. Moore
  • Patent number: 7865673
    Abstract: A method for writing data to a storage pool, including receiving a first write operation for a first block, determining a first replication type for the first block, determining a number of physical blocks (n1) required to write the first block to the storage pool using a size of the first block and the first replication type, if n1 is not a multiple of the maximum supported replication level of the storage pool: allocating a number of padded physical blocks (p1) to n1 until n1+p1 is a multiple of a maximum supported replication level of the storage pool, and writing the first block to the storage pool by filling in the n1 physical blocks.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: January 4, 2011
    Assignee: Oracle America, Inc.
    Inventors: William H. Moore, Jeffrey S. Bonwick
  • Patent number: 7818526
    Abstract: A semiconductor memory device for measuring a data access time by controlling data output operation, including: a pipe latch control unit for generating an input control signal based on a test mode signal; a pipe latch unit for receiving data and controlling the data according to a CAS latency in synchronization with a clock signal at a normal mode or passing the data without synchronization with the clock signal at a test mode based on the input control signal; an output control unit for generating an output node control signal based on the test mode signal; and an output unit for controlling an output data outputted from the pipe latch means according to the CAS latency in synchronization with the clock signal at the normal mode or passing the output data without synchronization with the clock signal at the test mode based on the output node control signal.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: October 19, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Ji-Eun Jang, Kee-Teok Park
  • Patent number: 7818519
    Abstract: A method for arbitrating between a plurality of access requests issued in relation to a resource by a plurality of requestors, wherein each request can be one of at least two types, a first of the types having a higher latency associated with its performance than at least some of the other types, the method including the steps of: (a) receiving a plurality of the access requests; (the requests are not placed anywhere, they are simply received); (b) maintaining a current pointer that points to a current timeslot in a timeslot list, and at least one lookahead pointer that points to a future timeslot in the timeslot list; and (c) in the event an access request as arbitrated via the lookahead pointer is of the first type, initiating performance of the access request earlier than the position in the list suggests it would be performed should it be started when the current pointer reached the timeslot.
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: October 19, 2010
    Assignee: Silverbrook Research Pty Ltd
    Inventor: Richard Thomas Plunkett
  • Patent number: 7809918
    Abstract: A method, apparatus, and computer-readable medium for providing memory management functions are provided. According to one method, a memory allocation process is exposed that receives a requested memory size with a memory allocation request and returns a pointer to an area of allocated memory of the requested memory size if available. A memory deallocation process is also exposed that receives requests to deallocate previously allocated memory regions in the form of a pointer to the memory region to be deallocated. The allocation and deallocation processes maintain a list of linked lists, each of the linked lists describing an unallocated portion of the memory. Only a single linked list must be updated by the allocation process. The deallocation process adds a new linked list and rebuilds the list of linked lists to merge any linked lists corresponding to adjacent portions of memory.
    Type: Grant
    Filed: July 22, 2005
    Date of Patent: October 5, 2010
    Assignee: American Megatrends, Inc.
    Inventor: Balasingh Samuel