Abstract: A plasma reactor process measurement instrument includes an input phase processor receiving wafer bias voltage, current and power and computing an input impedance, an input current and an input voltage to the transmission line; a transmission line processor for computing a junction admittance of a junction between the transmission line and the conductive grid from the input impedance, input current and input voltage and from parameters of the transmission line; a grid-to-ground transformation unit for providing shunt electrical quantities of a shunt capacitance between the grid and a ground plane; a grid-to-wafer transformation unit for providing load electrical quantities of a load capacitance between the grid and the wafer; and, a combined transformation processor for computing the at least one of the etch rate, plasma ion density and wafer voltage from the junction admittance, the shunt electrical quantities, the load electrical quantities and a frequency of the RF power generator.

Abstract: The cylinder includes a core and a coating covering most of the core. The core is made from a heat-resistant or insulating material. The core has inner and outer side walls and opposing first and second ends. The outer side wall is further away from a central longitudinal axis of the cylinder than the inner wall. The first end is configured to contact an edge ring that supports a semiconductor substrate. The coating is substantially opaque to infrared radiation, and covers all external surfaces of the core except for the first end. The core is preferably made from quartz or ceramics, while the coating is preferably made from a polysilicon.

Abstract: A plasma CVD apparatus comprises an anode electrode and a cathode electrode, and is for forming a thin film on a substrate by performing plasma discharge between the anode electrode and the cathode electrode, comprising: a substrate holder disposed between the anode electrode and the cathode electrode; and one conductive member disposed between the substrate holder and one electrode of either the anode electrode or the cathode electrode, wherein the substrate holder supports the substrate, the one conductive member is provided between the one electrode and the substrate holder so as to substantially cover an entire space between the one electrode and the substrate holder, and the one conductive member is electrically connected to the one electrode and the substrate holder.

Abstract: A pivoting wafer carrier having a minimum of internal friction and a smooth, continuous pivoting motion. The pivot mechanism includes a lower ring mounted on a pressure plate, an upper ring mounted on a housing upper plate and ball transfer units disposed on the lower ring. Corresponding bearing wedges depend downwardly from the upper ring. As the pressure plate tilts during the polishing process, the load balls of the ball transfer units roll against the corresponding wedges, thus producing a smooth, continuous pivoting motion. A universal joint may be provided to the carrier to effect the rotation of the carrier and to aid the smooth, continuous pivoting motion of the wafer carrier.

Abstract: A plasma immersion ion implantation reactor for ion implanting a species into a surface layer of a workpiece includes an enclosure which has a side wall and a ceiling defining a chamber and a workpiece support pedestal within the chamber having a workpiece support surface facing the ceiling and defining a process region extending generally across the wafer support pedestal and confined laterally by the side wall and axially between the workpiece support pedestal and the ceiling. The enclosure has at least a first pair of openings at generally opposite sides of the process region and a first hollow conduit outside of the chamber having first and second ends connected to respective ones of the first pair of openings, so as to provide a first reentrant path extending through the conduit and across said process region.

Abstract: An apparatus of fabricating a semiconductor device includes: a chamber; a radio frequency (RF) power supply supplying an RF power for the chamber; a matching box including a matching unit adjusting an impedance of the RF power; and a chuck penetrating a surface of the chamber, the chuck including a fixing means to fix the matching box to the chuck.

Abstract: Disclosed is an etching apparatus enabling to increase productivity of etching glass substrates. The present invention includes an etching bath having an etchant, a plurality of sensors inside the etching bath detecting a level of the etchant, and a deionized water tube spraying a deionized water to the sensors.

Abstract: Embodiments of the present invention relate to an apparatus and method of plasma assisted deposition by generation of a plasma adjacent a processing region. One embodiment of the apparatus comprises a substrate processing chamber including a top shower plate, a power source coupled to the top shower plate, a bottom shower plate, and an insulator disposed between the top shower plate and the bottom shower plate. In one aspect, the power source is adapted to selectively provide power to the top shower plate to generate a plasma from the gases between the top shower plate and the bottom shower plate. In another embodiment, a power source is coupled to the top shower plate and the bottom shower plate to generate a plasma between the bottom shower plate and the substrate support.

Abstract: A method for forming fine grooves including forming a first silicon-nitride layer on a substrate, forming a first poly-silicon layer on the first silicon-nitride layer, forming a second silicon-nitride layer on the first poly-silicon layer, patterning the second silicon-nitride layer, etching the first poly-silicon layer using the patterned second silicon-nitride layer as a mask, forming at least one patterned oxidized portion of the first poly-silicon layer by oxidizing the substrate, first silicon-nitride layer, etched first poly-silicon layer, and patterned second silicon-nitride layer, removing the patterned second silicon-nitride layer and etched first poly-silicon layer such that the first silicon-nitride layer and at least one patterned oxidized portion of the first poly-silicon layer remain on the substrate, and forming a plurality of fine grooves over the substrate by plasma etching the first silicon-nitride layer using the at least one patterned oxidized portion of the first poly-silicon layer as a

Abstract: An electrical connection means 45 guides a DC voltage, which is generated in an ion sheath when a plasma is excited, to a first electrode 31 where a substrate W is placed. Hence, the DC voltage is applied to both the upper and lower surfaces of the substrate W, so the two surfaces of the substrate have the same potential. As a result, element breakdown, which occurs when a large potential difference occurs between the two surfaces of the substrate W, can be prevented.

Abstract: A method of creating and using a polishing substrate having a coating layer is described. The method that includes providing a substrate having one or more predetermined patterns disposed on a surface of the substrate and coating the surface of the substrate with an abrasive to form a coated substrate conforming to the predetermined pattern. An apparatus enabling preparation and use of a fixed abrasive polishing member is described. The apparatus includes a patterned substrate, an abrasive coating a surface of the patterned substrate and a vacuum deposition chamber in which the abrasive is applied to the surface of the substrate. In addition, rather than a fixed abrasive, non-abrasive material may be applied to the surface of the patterned substrate, in which case, a conventional slurry may be used in planarization of an applied semiconductor wafer.

Abstract: The placement of a wafer can be performed with good positional precision, and the positioning of wafer clamps during maintenance is facilitated. A tapered recess is formed in that portion of the wafer support on which a wafer is placed. When a wafer is placed in the recess, the sloped surface inside this recess comes into contact with the edge of the wafer from beneath the wafer. The wafer is supported in a specific attitude by the sloped surface inside this recess.

Abstract: A segmented electrode apparatus for use in plasma processing in a plasma chamber or as part of a plasma processing system. The apparatus is composed of a plurality of electrode segments each having an upper surface, a lower surface and a periphery. The lower surfaces of the electrode segments define an electrode segment plane. Further included in the electrode is a plurality of displaceable insulating ring assemblies with a conductive shielding layer in each of them. Each assembly has an insulating body with an upper and lower portion and surrounds a corresponding one of the electrode segments at the electrode segment periphery. Each insulating ring assembly is arranged adjacent another insulating ring assembly and is displaceable with respect thereto and to the corresponding electrode segment. Also included in the electrode apparatus is a plurality of displacement actuators connected to the chamber and to the plurality of insulating ring assemblies at the insulating body upper portions.

Abstract: In a method for manufacturing an ink jet recording head provided with a pressure generating chamber, this chamber includes a through-hole of a chamber plate and a pair of plates, between which plates the chamber plate is sandwiched. The processing step for forming this through-hole further includes the sub-steps of forming a first resist film and a second resist film on a first and a second surface of the chamber plate, respectively, wherein the resist films assume substantially a same shape, but are different in length from each other when measured in a direction parallel to a flow direction of ink, and etching away both the first and second surface of the chamber plate using the resist films as its masks so that the through-hole is formed in the chamber plate and serves as the pressure generating chamber.

Abstract: A method of removing photoresist from semiconductor wafers through the use of a sparger plate. According to the inventive method, at least one semiconductor wafer is positioned in a process tank above the sparger plate. A mixture of ozone and deionized water is introduced into the process tank at a position below the sparger plate. The mixture of ozone and deionized water is then introduced across the wafer via the sparger plate at an increased flow velocity while the wafer is submerged in the mixture of deionized water and ozone.