Patents Examined by Maureen Passey
  • Patent number: 9130018
    Abstract: A plasma etching method that can increase the selection ratio of a stop layer to an interlayer insulation film. The plasma etching method is carried out on a substrate that has the interlayer insulation film formed of CwFx (x and w are predetermined natural numbers) and a stop layer that stops etching and is exposed at the bottom of a hole or a trench formed in the interlayer insulation film. The interlayer insulation film and the stop layer are exposed at the same time to plasma generated from CyFz (y and z are predetermined natural numbers) gas and hydrogen-containing gas.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: September 8, 2015
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Naotsugu Hoshi, Noriyuki Kobayashi
  • Patent number: 9127374
    Abstract: A method for growing an epitaxial film on a surface of a semiconductor wafer by mounting the wafer within a susceptor pocket and supplying source gas and carrier gas to the upper surface side of the susceptor and supplying carrier gas to the lower surface side of the susceptor. The susceptor includes a substantially circular bottom wall and a sidewall encompassing the bottom wall to form a pocket for mounting the wafer, wherein a plurality of circular through-holes are formed in the bottom wall in an outer peripheral region a distance of up to about ½ the radius toward the center of the bottom wall. The total opening surface area of the through-holes is 0.05 to 55% of the surface area of the bottom wall, the opening surface area of each through-hole is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: September 8, 2015
    Assignee: SUMCO CORPORATION
    Inventors: Masayuki Ishibashi, John F. Krueger, Takayuki Dohi, Daizo Horie, Takashi Fujikawa