Abstract: A method of determining contact positions of a robot relative to a workpiece in a workspace of the robot. The method utilizes the contact positions to determine a location of the workpiece in the robot workspace. The method also monitors an integral operating parameter within the robot, such as motor torque, to determine the contact positions of the robot relative to the workpiece and to locate the workpiece.

Abstract: A control method for a process of synthesis of at least one chemical product in an equipment comprising at least one reactor (R) which is assimilated to a mixed reactor, in which manipulated variables (GC) allow to act on the course of the process in order to make one or more variables related to the properties of the product and/or to the running of the process, which are called controlled variables (GR).

Abstract: A video decoding apparatus for decoding encoded video data to continuously produce decoded pictures. The video data includes a series of pictures, each picture contains a series of slices, and each slice contains a series of macroblocks. A dequantizer performs dequantization of the video data based upon a quantization threshold value. A motion-vector restoring circuit restores data for each macroblock. A direct current error detector is provided to detect erroneous macroblocks based upon the dequantized data. A motion-area error detector is provided to detect erroneous macroblocks based upon the restored motion vector data. An erroneous macroblock is replaced by a corresponding macroblock from a preceding picture. Subsequent macroblocks in a slice may also be replaced by corresponding macroblocks from a preceding picture.

Abstract: A memory block structure for use within a viterbi decoder includes multiple dual port RAMs configured as multiport RAMs. The memory block structure is configured to allow a one-word write operation and an N-word read operation during a single clock cycle in order to achieve one decoded output symbol per clock period using the viterbi algorithm. By using dual port RAMs, a more densely packed and less expensive memory block structure is achieved. An encoded stream of input symbols are input to the viterbi decoder and written to the memory block structure one word at a time. Once X+Y bits have been written to the memory block structure, the decoder will then read N words from the memory block structure, simultaneously, reading back through X+Y words and outputting Y bits N at a time at the end of the trace back through memory.

Abstract: A rectifying transfer gate circuit includes first and second field effect transistors and one diode. The source of the first field effect transistor is coupled to a first input node and the gate thereof is coupled to a second input node. Meanwhile, the source of the second field effect transistor is coupled to the second input node and the gate thereof is coupled to the first input node. The diode is coupled between the common drain of the first and second field effect transistors and an output node, so as to increase the speed of the operation in the application circuit utilizing the above rectifying transfer gate circuit.

Abstract: An ATM switch including a multi-port memory is described. The multi-port memory having a dynamic random access memory (DRAM) and a plurality of input and output serial access memories (SAMs). Efficient, flexible transfer circuits and methods are described for transferring ATM data between the SAMs and the DRAM. The transfer circuits and methods include helper flip/flops to latch ATM data for editing prior to storage in the DRAM. Editing of ATM data transferred from the DRAM is also described. Dynamic parity generation and checking is described to detect errors induced during switching.

Abstract: A communication system uses a main signal having a plurality of signal frames each of which has first data and a first monitor bit. The first monitor bit in one of the signal frames is determined by the first data in a preceding signal frame which next precedes the one of the signal frames. A data inserting device inserts second data into the main signal. A monitor bit producing device produces a second monitor bit in response to the first and the second data and the first monitor bit. The second monitor bit holds monitor data which have data of first monitor bits which are held in preceding signal frames which precede the one of the signal frames. A monitor bit changing device changes the first monitor bit into the second monitor bit in the one of the signal frames.