Abstract: Dynamic heterogeneous hashing function technology for balancing memory requests between multiple memory channels is described. A processor includes functional units and multiple memory channels, and a memory controller unit (MCU) coupled between them. The MCU includes a dynamic heterogeneous hashing module (DHHM) that includes multiple specific-purpose hashing function blocks that define different interleaving sequences for memory requests to alternately access the multiple memory channels. The DHHM also includes a hashing-function selection block. The hashing-function selection block is operable to identify a requesting functional unit originating a current memory request and to select one of the specific-purpose hashing function blocks for the current memory request in view of the requesting functional unit.

Abstract: A non-volatile memory organized into flash erasable blocks sorts units of data according to a temperature assigned to each unit of data, where a higher temperature indicates a higher probability that the unit of data will suffer subsequent rewrites due to garbage collection operations. The units of data either come from a host write or from a relocation operation. Among the units more likely to suffer subsequent rewrites, a smaller subset of data super-hot is determined. These super-hot data are then maintained in a dedicated portion of the memory, such as a resident binary zone in a memory system with both binary and MLC portions.

Abstract: An integrated circuit comprising a memory and a logic circuit. The memory may comprise a plurality of storage elements each configured to read and write data in response to an internal address signal. The logic circuit may be configured to generate a predetermined number of the internal address signals in response to (i) an external address signal, (ii) a clock signal and (iii) one or more control signals. The generation of the predetermined number of internal address signals may be non-interruptible.

Abstract: A storage system for storing and retrieving data records. The system includes a storage medium, a controller, and a message log. The storage medium stores data records, the data records being indexed by addresses which specify the location of the data records in the storage medium. The controller receives write messages from processors coupled to the controller. Each write message includes a data segment to be written to the storage medium at a specified address, and coordination information specifying a timestamp, and the addresses of other data records on other storage systems that were written in same write operation. The log stores the write messages prior to the data contained therein being written to the storage medium. Periodically, the controller reads the timestamps of the messages in the log and compares the timestamps to a clock in the controller to determine the message having the oldest timestamp.