Abstract: In a method for preparing silicon-on-insulator, the first etching stop layer, the second etching stop layer, and the device layer are formed bottom-up on the p-type monocrystalline silicon epitaxial substrate, where the first etching stop layer is made of intrinsic silicon, the second etching stop layer is made of germanium-silicon alloy, and the device layer is made of silicon. After oxidation, bonding, reinforcement, and grinding treatment, selective etching is performed. Through a first selective etching to p+/intrinsic silicon, the thickness deviation of the first etching stop layer on the second etching layer is controlled within 100 nm, and then through the second etching and the third etching, the thickness deviation and the surface roughness of the finally prepared silicon-on-insulator film can be optimized to less than 5 nm and less than 4 ?, respectively, so as to realize the flatness of the silicon-on-insulator film.

Abstract: A memory device includes a plurality of first conductive lines on a substrate and extending in a first direction, a plurality of second conductive lines on the plurality of first conductive lines and extending in a second direction intersecting the first direction, and a plurality of memory cells respectively between the plurality of first conductive lines and the plurality of second conductive lines. Each of the plurality of memory cells includes a switching element and a variable resistance material layer. The switching element includes a material having a composition of [GeX PY SeZ](1-W) [O]W, where 0.15?X?0.50, 0.15?Y?0.50, 0.35?Z?0.70, and 0.01?W?0.10.

Abstract: A method for manufacturing a semiconductor device is provided. A drift region and a compensation region are formed through a deep trench etching and a filling technology. A plurality of modulation doping regions are formed at a top of the drift region by an epitaxy and an ion implantation. A modulation region is introduced, wherein the modulation region flexibly modifies capacitance characteristics and achieve improved dynamic characteristics.

Abstract: An image sensor may include a substrate including first and second surfaces opposite to each other and including a single crystalline layer, a first epitaxial layer, and a second epitaxial layer sequentially stacked from the second surface. The single crystalline layer and the second epitaxial layer may be doped with first impurities of a first conductivity type. The first epitaxial layer may be doped with second impurities of a second conductivity type. A pixel separation structure extends from the first surface to penetrate at least the second and first epitaxial layers and divides the substrate into a plurality of pixels. A transfer gate electrode extends from the first surface to penetrate the second epitaxial layer. A doping concentration of the first impurities doped in the single crystalline layer may be higher than that in the second epitaxial layer.