Patents Examined by Meng-Al T. An
  • Patent number: 11709716
    Abstract: A method may include receiving, by a privileged component executed by a processing device, bytecode of a packet processing component from an unprivileged component executed by the processing device, analyzing, by the privileged component, the bytecode of the packet processing component to identify whether the bytecode comprises a first command that returns a redirect, analyzing, by the privileged component, the bytecode of the packet processing component to identify whether the bytecode comprises a second command that returns a runtime computed value, and responsive to determining that the bytecode comprises the first command or the second command, setting a redirect flag maintained by the privileged component.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: July 25, 2023
    Assignee: Red Hat, Inc.
    Inventors: Michael Tsirkin, Jesper Brouer
  • Patent number: 11537430
    Abstract: A wait optimizer circuit can be coupled to a processor to monitor an entry of a virtual CPU (vCPU) into a wait mode to acquire a ticket lock. The wait optimizer can introduce an amount of delay, while the vCPU is in the wait mode, with an assumption that the spinlock may be resolved before sending a wake up signal to the processor for rescheduling. The wait optimizer can also record a time stamp only for a first entry of the vCPU from a plurality of entries into the wait mode within a window of time. The time stamps for vCPUs contending for the same ticket lock can be used by a hypervisor executing on the processor for rescheduling the vCPUs.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: December 27, 2022
    Assignee: Amazon Technologies, Inc.
    Inventor: Ali Ghassan Saidi
  • Patent number: 11392407
    Abstract: A semiconductor device containing a CPU capable of receiving an interrupt request signal and a task control circuit is provided. The semiconductor device includes a CPU (processor), a save circuit, and a task control circuit. The CPU includes a program counter that is updated when a task is executed. The semiconductor device includes an interrupt-related data save circuit that stores the data of the program counter when the CPU receives a CPU interrupt request signal. The data of the program counter stored in the interrupt-related data save circuit is stored in an save circuit and is used for restoring from the interrupt processing.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: July 19, 2022
    Inventors: Kazuya Ishida, Hiroyuki Kondo
  • Patent number: 11360823
    Abstract: Implementations include actions of receiving, by an intelligent quality assurance (iQA) platform, a desired state (DS) file including data indicative of a desired state of a cloud computing environment, triggering, by the iQA platform, an auto-discovery process to provide an actual state of the cloud computing environment based on cloud resources instantiated within the cloud environment, and application resources executing within the cloud environment, the auto-discovery process including retrieving first credentials to enable automated access to the cloud computing environment, determining, by the iQA platform, a delta between the actual state, and the desired state, and providing, by the iQA platform, a report including the delta.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: June 14, 2022
    Assignee: Accenture Global Solutions Limited
    Inventors: Jayanti Vemulapati, Murtuza Chitalwala
  • Patent number: 11068294
    Abstract: A method is discussed for balancing processing loads to at least a first and a second VM instances associated with the same processing circuitry. Information about first and second applications respectively running on the first and second VM instances is obtained. Incoming data corresponding to a first and second pluralities of jobs to be performed respectively by the first and second VM instances is received. Based on the obtained information and on the received data, a first number of the first plurality of jobs which the first VM instance is allowed to perform is determined by means of the processing circuitry, and a second number of the second plurality of jobs which the second VM instance is allowed to perform is determined by means of the processing circuitry. The first VM instance is instructed to release the processing circuitry after having performed the determined first number of jobs to allow the second VM instance to use the processing circuitry for performing the second number of jobs.
    Type: Grant
    Filed: November 26, 2015
    Date of Patent: July 20, 2021
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Daniel Turull, Lars Westberg
  • Patent number: 10860357
    Abstract: A multi-tenant environment is described with a configurable hardware logic platform (e.g., a Field Programmable Gate Array (FPGA)) positioned on a host server computer. The configurable hardware logic platform can be programmed with a host logic wrapper portion, which is controlled by a service provider, and a customer portion, which is programmed with logic provided by a tenant of the service provider. While the host logic wrapper portion is reprogrammed, protections are put in place to prevent a virtual machine or the customer logic from violating security built within the host logic wrapper portion. Such protections can be suspending communications between the virtual machine and the customer logic until the host logic wrapper is reprogrammed.
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: December 8, 2020
    Assignee: Amazon Technologies, Inc.
    Inventors: Robert Michael Johnson, Asif Khan, Nafea Bshara, Kiran Kalkunte Seshadri
  • Patent number: 10713092
    Abstract: Systems and methods for resource management for multi-tenant applications in a Hadoop cluster are disclosed. In one embodiment, in an information processing device comprising at least one computer processor, a method for resource management for multi-tenant applications in a Hadoop cluster may include: (1) allocating an initial allocation of a resource in a resource pool to a plurality of tenants, each tenant having a workload; (2) determining a memory requirement for each of the plurality of tenants; (3) determining a maximum number of concurrent queries or jobs for each of the plurality of tenants; (4) determining a memory and vcore requirement for each of the plurality of tenants based on the memory requirement and maximum number of concurrent queries or jobs; and (5) allocating the resources to each of the plurality of tenants.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: July 14, 2020
    Inventors: Akhilesh Gupta, Suman Kumar Addanki, James P. Cuddihy, Jay Rajaram, Ratikanta Mishra, Michael Aguiling
  • Patent number: 10152343
    Abstract: In example implementations, when a management program deploys new virtual machines, the management program may identify candidate virtual machines for replacement, score the possibilities of replacement and relate the new virtual machines to candidate virtual machines if it determines the probability of replacement is high. The management program may also migrate virtual machines and storage volumes used by the virtual machines to other physical servers and storage arrays by related pairs of virtual machines. The management program may also inherit management policies from existing virtual machines being replaced and leverage them to manage new virtual machines, which replace the existing virtual machines.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: December 11, 2018
    Assignee: HITACHI, LTD.
    Inventor: Yasutaka Kono
  • Patent number: 10102035
    Abstract: Examples are described for computing resource discovery and management for a system of configurable computing resources that may include disaggregate physical elements such as central processing units, storage devices, memory devices, network input/output devices or network switches. In some examples, these disaggregate physical elements may be located within one or more racks of a data center.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: October 16, 2018
    Assignee: Intel Corporation
    Inventors: Katalin K. Bartfai-Walcott, John Kennedy, Thijs Metsch, Chris Woods, Giovani Estrada, Alexander Leckey, Joseph Butler, Slawomir Putyrski
  • Patent number: 7703097
    Abstract: A DLI call from the batch application is intercepted, wherein the DLI call is made for the purpose of accessing a hierarchical database. It is then determined if the access to the hierarchical database is a checkpoint trigger event. A segment counter for a trigger segment in a checkpoint trigger for the checkpoint trigger event is incremented if the trigger segment is identified by the DLI call. The segment counter is compared to a segment commit threshold in the checkpoint trigger and commit point processing is performed on behalf of the batch application if the segment counter is in a predetermined relation to the segment commit threshold.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: April 20, 2010
    Assignee: International Business Machines Corporation
    Inventors: Alan R. Smith, James C. Wright
  • Patent number: 7587718
    Abstract: One embodiment of the present invention provides a system that enforces a resource-usage policy in a compute farm. During operation, the system can receive etiquette rules which include resource-usage rules and corrective-action rules. Resource-usage rules can specify situations in which the resource-usage policy is violated, and corrective-action rules can specify situations in which a corrective action needs to be performed. Next, the system can receive resource-usage information which includes job monitoring data and process monitoring data. The system can then determine a resource-usage violation by applying the resource-usage rules to the resource-usage information. Next, the system can store the resource-usage violation in a violation database. The system can then determine a corrective action by applying corrective-action rules to a series of violations stored in the violation database. Next, the system can perform the corrective action, thereby enforcing the resource-usage policy in the compute farm.
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: September 8, 2009
    Assignee: Synopsys, Inc.
    Inventors: John R. Mincarelli, Sriram Sitaraman
  • Patent number: 7543288
    Abstract: Techniques for implementing virtual machine instructions suitable for execution in virtual machines are disclosed. The inventive virtual machine instructions can effectively represent the complete set of operations performed by the conventional Java Bytecode instruction set. Moreover, the operations performed by conventional instructions can be performed by relatively fewer inventive virtual machine instructions. Thus, a more elegant, yet robust, virtual machine instruction set can be implemented. This, in turn, allows implementation of relatively simpler interpreters as well as allowing alternative uses of the limited 256 (28) Bytecode representation (e.g., a macro representing a set of commands). As a result, the performance of virtual machines, especially, those operating in systems with limited resources, can be improved by using the inventive virtual machine instructions.
    Type: Grant
    Filed: March 27, 2001
    Date of Patent: June 2, 2009
    Assignee: Sun Microsystems, Inc.
    Inventors: Stepan Sokolov, David Wallman
  • Patent number: 7503032
    Abstract: A computer implemented system analysis and design method for use in a complex business environment characterized by a set of tightly linked business processes captures in a framework a world view of a business decision and/or a business application software system. A world view is defined by business objectives, constraints, assumptions, data, and underlying model used in business decision and/or the application software system. The framework is used to specify and document each business decision and/or business application software system in the complex environment. A BDML (Business Decision Markup Language) is used to implement the framework for specifying the world view of a business decision and/or a business application software system.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: March 10, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kumar Bhaskaran, Guillermo Gallego, Ying Huang, Ying T. Leung, Nitin R. Nayak, Sanjay E. Ramaswamy
  • Patent number: 7503048
    Abstract: Systems and methods for scheduling program units that are part of a process executed within an operating system are disclosed. Additionally, at least one thread is started within the operating system, the thread is associated with the process. Further, a plurality of streams within the thread are selected for execution on a multiple processor unit. Upon the occurrence of a context shifting event, one of the streams enters a kernel mode. If the first stream to enter kernel mode must block, then the execution of the other streams of the plurality of streams is also blocked.
    Type: Grant
    Filed: August 18, 2003
    Date of Patent: March 10, 2009
    Assignee: Cray Incorporated
    Inventors: Kitrick Sheets, Josh Williams, Jonathan Gettler, Steve Piatz, Andrew B. Hastings, Peter Hill, James G. Bravatto, James R. Kohn, Greg Titus
  • Patent number: 7503047
    Abstract: The present disclosure is a method for storing possible classes or class containers (Jars) based on usage patterns of JVMs. The classes may be stored in the memory area of the JVM that may use those most and is closest to the actual system for access. Distributed environments where memory is shared across all systems can access memory across all systems but access speed is only high close to the current system with a fast connection and bandwidth towards this memory area.
    Type: Grant
    Filed: April 8, 2008
    Date of Patent: March 10, 2009
    Assignee: International Business Machines Corporation
    Inventor: Christian Richter
  • Patent number: 7434219
    Abstract: A computer system that includes a processor for operating a software application in the computer system. The software application provides for creation, storage, and retrieval of a file, the file having a corresponding profile that the software application uses for at least the purpose of preparing the software application to display the file upon its retrieval by the software application. Also included is a plurality of storage media that are communicatively coupled to the processor. A storage management module distributes stored files and their accompanying profiles among the plurality of storage media according to predetermined patterns. One of such predetermined patterns is separate storage of a file and the file's corresponding profile.
    Type: Grant
    Filed: June 14, 2001
    Date of Patent: October 7, 2008
    Assignee: CommVault Systems, Inc.
    Inventors: Randy De Meno, Jeremy A. Schwartz, Anand Prahlad, James J. McGuigan
  • Patent number: 7418702
    Abstract: Supporting multiple users concurrent login and providing each user to be able to perform multiple concurrent tasks in his/her computer work environment are very critical to modem computer user working environment, which is running on top of modem operating system, due to it greatly improved machine efficiency and user's productivities. Therefore, supporting multiple users concurrent login CCDSVM through each user's web-browser and providing each user to be able to perform multiple concurrent tasks in his/her single login web-browser over resources of CCDSVM will qualify the conventional web-browser to be a new means of a computer user working environment at the Internet era.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: August 26, 2008
    Inventor: Sheng (Ted) Tai Tsao
  • Patent number: 7415705
    Abstract: A method, apparatus and computer instructions for hardware assist for autonomically patching code. The present invention provides hardware microcode to a new type of metadata to selectively identify instructions to be patched for specific performance optimization functions. The present invention also provides a new flag in the machine status register (MSR) to enable or disable a performance monitoring application or process to perform code-patching functions. If the code patching function is enabled, the application or process may patch code at run time by associating the metadata with the selected instructions. The metadata includes pointers pointing to the patch code block code. The program code may be patched autonomically without modifying original code.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: August 19, 2008
    Assignee: International Business Machines Corporation
    Inventors: Jimmie Earl DeWitt, Jr., Frank Eliot Levine, Christopher Michael Richardson, Robert John Urquhart
  • Patent number: 7412692
    Abstract: A method for determining a required solution subset from a set of solutions for eliminating a computer program execution error is provided.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: August 12, 2008
    Assignee: International Business Machines Corporation
    Inventors: Marina Biberstein, Shay Bushinsky, Eitan Farchi, Shmuel Ur
  • Patent number: 7409686
    Abstract: Disclosed is a method of constructing and executing a process. A conventional process is minutely divided into minimum unit subprocesses, and the minutely divided subprocesses are classified into a decision subprocesses and a routine subprocess by whether they require decision-making. Any subprocess which is executable using the setup condition in a specific decision subprocess is classified into the routine subprocess in such a manner that the classified routine subprocess follows on the specific decision subprocess. One or a series of decision subprocesses are combined with one or a series of routine subprocesses which are executable on the condition of the completion of the decision subprocesses to form one unit process, and a job-support computer program is created to allow the plurality of subprocesses included in the one unit process to be successively executed.
    Type: Grant
    Filed: August 13, 2003
    Date of Patent: August 5, 2008
    Assignee: INCS, Inc.
    Inventors: Shinjiro Yamada, Masayuki Nakao, Tomohito Ohmori, Michiyo Kuwabara