Abstract: A method and circuits of a high isolation and high-speed buffer amplifier capable to handle frequencies in the GHz range have been achieved. The output to input isolation is primary dependent on the gate-source capacitance of the active buffer transistor. Having two or more in series and by reducing the impedance between them a high isolation can be achieved. The input signals are split in several signal paths and are amplified in the push-pull mode using source follower amplifiers. Then the amplified signals are being combined again. The amplified output current is mirrored applying a multiplication factor. Said method and technology can be used for buffer amplifiers having differential input and differential output or having single input and single output or having differential input and single output. A high reversed biased (output to input) isolation and a reduced quiescent current have been achieved.

Abstract: A biasing device includes closed-loop transconductance slaving circuit, able to slave the time average of the base/emitter or gate/source voltage of the amplifier transistor (Q1) to a reference voltage corresponding to a desired quiescent current for the transistor. Moreover, viewed from the base or gate of the amplifier transistor (Q1), the impedance of the base/emitter or gate/source circuit is small at low frequency, and large with respect to the impedance of the radio frequency source within the radio frequency range of the signal. The device can be incorporated in a mobile terminal, such as a cellular mobile phone.

Abstract: A phase-locked loop configured to cause an output signal to tend toward a desired output frequency based on an applied reference signal. In a first configuration, the phase-locked loop includes a voltage controlled oscillator operatively coupled with a bias generator. The voltage controlled oscillator is configured to produce the output signal in response to a VCO current generated via application of a biasing signal from the bias generator. The VCO current produces a regulated VCO voltage within the voltage controlled oscillator, and the bias generator is configured so that the regulated bias generator voltage matches the regulated VCO voltage free of any direct coupling between the bias generator and the regulated VCO voltage. In another configuration, the phase-locked loop includes a charge pump system having semiconductor components that correspond to only a portion of a voltage controlled oscillator associated with the loop.

Abstract: An improved semiconductor device having a vertical MOS and another MOS circuit such as C-MOS is shown. To insulate the circuit from influences from the operation of the vertical MOS, the vertical MOS is fabricated in a diffused region which is formed on a semiconductor substrate while the circuit is fabricated in an epitaxial layer of an opposite conductivity type to that of the substrate.