Abstract: A computer accesses a storage device. The computer includes a processor and a non-transitory computer-readable storage medium storing computer-readable instructions, when executed by the processor, the computer-readable instructions cause the computer to perform: storing a first time-lock and a second time-lock in the storage device; and, when both the first time-lock and the second time-lock are successfully stored in the storage device by the computer, to obtain an exclusive access privilege during a particular time interval associated with the first time-lock and the second time-lock.

Abstract: The embodiments described herein provide a system and method for efficiently storing small, random modifications or changes to data on one or more storage devices, such as disks, of storage servers coupled to a host computer in a network environment. Illustratively, the data is stored in a region of a byte-addressable, persistent memory of the host computer and is replicated (i.e., copied) as changed data of the region on the disks at the granularity at which it was modified, e.g., at the byte-addressable granularity. To that end, each storage server employs a data structure (e.g., a Fibonacci array) that is configured to efficiently accumulate the small, random data changes into one or more large blocks of changed data for storage on the disks in a manner that realizes the streaming bandwidth of the disk.

Abstract: A system including memory and a resource controller. The memory includes a first memgroup and a second memgroup, wherein the first memgroup comprises a first physical page mapped to a virtual page, and wherein the second memgroup comprises a second physical page. The resource controller is configured to receive a request to stop the first memgroup, instruct a memory power management subsystem to mark the first memgroup as stopped in response to receiving the request to stop the first memgroup, wherein no free pages are allocated from the first memgroup after the first memgroup is marked as stopped, remap the virtual page to the second physical page in response to the marking the first memgroup as stopped, and reduce power to the first memgroup in response to a determination that the first physical page is not mapped to the virtual page.

Abstract: A method begins by a processing module determining whether a memory device of a dispersed storage (DS) unit is unavailable to produce an unavailable memory device. The method continues with the processing module determining a methodology regarding DS encoded data stored in the unavailable memory device based on one or more dispersed storage network (DSN) conditions to produce a determined methodology when the memory device is unavailable. The method continues with the processing module initiating, in accordance with the determined methodology, a rebuilding function to rebuild the DS encoded data to produce rebuilt DS encoded data when the determined methodology includes a rebuilding component. The method continues with the processing module storing the rebuilt DS encoded data within available memory of the DS unit.

Abstract: A snapshot volume is migrated by using a primary volume of a migration destination storage apparatus. The management server comprises a controller for generational management, by means of the snapshot volumes, of differential data for the logical volume which is the parent volume of the snapshot volume, and, if an instruction to copy a snapshot volume of a designated generation is received and a snapshot volume prior to the designated generation of the copy instruction-target snapshot volume exists, the controller copies the differential data between the designated-generation snapshot volume and the existing snapshot volume, and associates the copied differential data with the existing snapshot volume.

Abstract: A method for using a single spare block pool in flash memory comprising: allocating a plurality of flash memory arrays, wherein each flash memory array comprises a plurality of flash memory blocks; within a main flash memory array: allocating a used block pool comprising a plurality of used blocks and allocating a main spare block pool comprising a plurality of spare blocks; within each of the other flash memory arrays: allocating a used block pool comprising multiple used blocks; allocating a minimum spare block pool comprising a minimum number of spare blocks; allocating the main spare block pool and each of the minimum spare block pools to a single spare block pool; transferring a spare block from the main spare block pool to one of the minimum spare block pools; and transferring a spare block from a first minimum spare block pool to a second minimum spare block pool.

Abstract: Method and apparatus for the non-destructive, selective purging of data from a non-volatile memory. In accordance with various embodiments, multiple copies of a selected set of confidential user data having a common logical address are stored to a confidential data portion of a non-volatile memory so that each copy is in a different location within the confidential data portion. A nondestructive purge of all said copies from the confidential data portion is carried out responsive to an externally supplied selective purge command so that all said copies are erased and other, non-purged confidential user data remain stored in the confidential data portion.

Abstract: A method is provided for adjusting a storage space of a partition of an embedded multimedia card and a terminal. The method includes: determining a current external SD card mode of a terminal, where the external SD card mode includes an external SD card installed mode or an external SD card uninstalled mode; receiving instruction information, where the instruction information is used for instructing the terminal to switch from the external SD card uninstalled mode to the external SD card installed mode, or used for instructing the terminal to switch from the external SD card installed mode to the external SD card uninstalled mode; and adjusting a size of a storage space of a partition of an embedded multimedia card according to the instruction information.

Abstract: Data is placed in tiered storage with a suitable granularity according to application characteristics. The storage apparatus comprises a controller for managing storage areas, provided by storage media of a plurality of types of varying performance, as pools, and for assigning the storage areas in page units to a virtual volume from any tiered storage among a plurality of types of tiered storage which the pool comprises in response to a data write request from the host computer, wherein, for specific data which is managed by the host computer, the controller specifies an area with a high referencing frequency among the specific data on the basis of organization information of the specific data, and moves this area to another of the tiered storage with a higher performance than an already assigned tiered storage.

Abstract: A processor includes a translation lookaside buffer (TLB) including a data array and a compare unit. The data array includes a number of entries each configured to store a respective translated physical address. In response to a read access to a given entry of the TLB, the data array is configured to output within a particular clock cycle, the respective translated physical address stored in the given entry. In addition the compare unit may be configured to compare the respective translated physical address output by the data array with a number of additional addresses. The compare unit may also be configured to provide a hit indication for each of the additional addresses within the particular clock cycle.

Abstract: Described herein are methods, systems, apparatuses and products for cost-aware replication of intermediate data in dataflows. An aspect provides receiving at least one measurement indicative of a reliability cost associated with executing a dataflow; computing a degree of replication of at least one intermediate data set in the dataflow based on the reliability cost; and communicating at least one replication factor to at least one component of a system responsible for replication of the at least one intermediate data set in the dataflow; wherein the at least one intermediate data set is replicated according to the replication factor. Other embodiments are disclosed.

Abstract: One or more unused bits of a virtual address range are allocated for aliasing so that multiple virtually addressed sub-pages can be mapped to a common memory page. When one bit is allocated for aliasing, dirty bit information can be provided at a granularity that is one-half of a memory page. When M bits are allocated for aliasing, dirty bit information can be provided at a granularity that is 1/(2M)-th of a memory page.

Abstract: A memory controller receives memory access requests from a host terminal, the memory access requests from the host terminal including one or both of host read requests and host write requests. The memory controller generates memory access requests. Priorities are assigned to the memory access requests. The memory access requests are segregated to memory unit queues of at least one set of memory unit queues, the set of memory unit queues associated with a memory unit. Each memory access request is sent to the memory unit according to a priority and an assigned memory unit queue of the memory access request.

Abstract: A data access method for accessing a rewritable non-volatile memory module via a data bus through a first and a second thread module, and a memory controller and a memory storage apparatus using the same are provided. In the present method, an access executing right is assigned to the second thread module to write page data. Whether an access command to be executed by the first thread module is received is determined when the second thread module writes a predetermined amount of page data into a predetermined number of physical pages. The access executing right is assigned to the first thread module when the access command is received, so that the first thread module executes the access command in a foreground mode and the second thread module executes an ongoing task in a background mode. Thereby, timeout caused by delayed response of the first thread module is effectively avoided.

Abstract: The present invention discloses a content addressable memory and a method of searching data thereof. The method includes generating a hash index data item from a received input data item; searching the cache for presence of a row tag of the RAM data row corresponding to the data item of hash index; in response to presence, searching the RAM for a RAM data item corresponding to the input data item according to the corresponding row tag of the RAM data row; in response to absence, searching the RAM for a RAM data item corresponding to the input data item by using the data item of hash index; and in response to finding a RAM data item corresponding to the input data item in the RAM, outputting data corresponding to the RAM data item. The method can accelerate data search in the CAM.

Abstract: Systems and methods for disabling write protection on a serial peripheral interface (SPI) chip are provided. In some aspects, a method includes providing for termination of asserting a hardware write protect pin on the SPI chip by providing for connection of the hardware write protect pin on the SPI chip to a power supply on the SPI chip. The method also includes setting a software write protect enable bit on the SPI chip to indicate that write protection is disabled on the SPI chip. The method also includes reprogramming at least one bit on the SPI chip to a substantially arbitrary value. The at least one bit is different from the hardware write protect pin and the software write protect enable bit.

Abstract: A cache memory includes a CAM with an associativity of n (where n is a natural number) and an SRAM, and storing or reading out corresponding data when a tag address is specified by a CPU connected to the cache memory, the tag address constituted by a first sub-tag address and a second sub-tag address. The cache memory classifies the data, according to the time at which a read request has been made, into at least a first generation which corresponds to a read request made at a recent time and a second generation which corresponds to a read request made at a time which is different from the recent time. The first sub-tag address is managed by the CAM. The second sub-tag address is managed by the SRAM. The cache memory allows a plurality of second sub-tag addresses to be associated with a same first sub-tag address.

Abstract: Technologies are generally described for a system for copying particular data in a particular sector of a particular block from a memory into a cache, in some examples, the cache includes a tag array and a data array. In some examples, a processor may be adapted to copy data in the particular sector from the memory into a way of the data array starling at a start sector. In some examples, the processor may be adapted to update the tag array to identify the particular sector. In some examples, the processor may be adapted to update the tag array to identify the way in the data array, in some examples, the processor may be adapted to update the tag array to identify the start sector.

Abstract: Systems and methods for providing early hinting to nonvolatile memory charge pumps are disclosed. Charge pumps associated with one or more nonvolatile memory dies can be proactively activated based on a determination that a command queue of access requests contains at least a threshold number of consecutive access requests of the same type. Based on analysis of the command queue, the memory controller can transmit an early hint command to a nonvolatile memory die to proactively activate its charge pump to provide a voltage suitable for executing the consecutive access requests of the same type.

Abstract: A method of allocating regions of memory including the steps of allocating a corresponding plurality of portions of memory for use by the process and marking regions of memory that are allocated with markers. A start of a region is marked with one of the markers and an end of a region is marked with a further one of the markers, the further one of the markers having a later relative time indication and marking a next allocated region. In response to determining that a region of allocated memory bounded by two of the markers is no longer required by the process, deleting an older of the two markers; and in response to detecting deletion of an oldest one of the markers, deallocating the region of memory up to a new oldest pending marker.