Abstract: According to one embodiment, a semiconductor device, including a substrate, a stacked layer body provided above the substrate, the stacked layer body alternately stacking an insulator and an electrode film one on another, silicon pillars contained with fluorine, the silicon pillar penetrating through and provided in the stacked layer body, a tunnel insulator provided on a surface of the silicon pillar facing to the stacked layer body, a charge storage layer provided on a surface of the tunnel insulator facing to the stacked layer body, a block insulator provided on a surface of the charge storage layer facing to the stacked layer body, the block insulator being in contact with the electrode film, and an embedded portion provided in the silicon pillars.
Type:
Grant
Filed:
September 8, 2011
Date of Patent:
January 7, 2014
Assignee:
Kabushiki Kaisha Toshiba
Inventors:
Ichiro Mizushima, Yoshiaki Fukuzumi, Shinji Mori
Abstract: Provided is a thin film transistor having a semiconductor film disposed in a plurality of portions on a substrate, a source electrode and a drain electrode which are disposed, on a semiconductor film, in contact with the semiconductor film while being spaced from each other, and a gate electrode which is disposed across the source electrode and the drain electrode via a gate insulating film; an auxiliary capacitance electrode which is disposed on the semiconductor film while in contact with the semiconductor film; a source line which has the semiconductor film in a lower layer, extends from the source electrode; a gate line which extends from the gate electrode; a pixel electrode which is electrically connected to the drain electrode; and an auxiliary capacitance electrode connecting line which electrically connects the auxiliary capacitance electrodes to each other in the adjacent pixels.
Abstract: A reflection convex mirror structure is applied to a vertical light-emitting diode (LED) which comprises a P-type electrode, a permanent substrate, a binding layer, a buffer layer, a mirror layer, a P-type semiconductor layer, a light-emitting layer, an N-type semiconductor layer and an N-type electrode that are stacked in sequence. Between the P-type semiconductor layer and the mirror layer, a filler and a mirror are disposed right below the N-type electrode. The filler is made of a transparent material and has a convex surface facing the light-emitting layer. The mirror is formed on the convex surface of the filler. By utilizing the filler and the mirror to form the reflection convex mirror structure, excited light is reflected towards two sides, so that the excited light can dodge the N-type electrode without being shielded to increase light extraction efficiency.
Abstract: According to one embodiment, a resistance change memory includes a memory cell unit. The memory cell unit is configured to stack a resistance change element and a diode element having non-ohmic properties, and the diode element is configured to stack in order to a semiconductor layer having a first conductivity type, a semiconductor layer having a second conductivity type, and a semiconductor layer having the first conductivity type from the first interconnect layer side. An area density of dopant impurities in the semiconductor layer having the second conductivity type is larger than a sum total of area densities of dopant impurities in the two semiconductor layers having the first conductivity type, and smaller than double an area density of an electric flux number associated with a threshold electric field of an interband tunneling current of a material includes the semiconductor layer having the second conductivity type.